納米CMOS工藝中高性能BJT研究與建模.pdf

1、復旦大學碩士學位論文納米CMOS工藝中高性能BJT研究與建模姓名：虞倩旻申請學位級別：碩士專業(yè)：電子與通信工程指導教師：唐長文20080925AbstractWiththescalingofCMOStechnologyonsilicon，processfeaturesizebecomessmallerandsmalleruptOnow32nmtechnologyon12inchwaferhasbecomethenexttechnolog

2、icaltargetCMOStechnologyonSiliconiswidelyusedindigitalcircuit，mixsignalcircuit，andRFcircuitsbecauseofitsobviousadvantageslikehighperformance，highintegration，lowpowerandlowCostHowever，despiteoftheseadvantages，itisnotwitho

3、utit’Slimitations，thelowfrequency1／fnoiseisoneofthem，whichcouldreducetheperformanceofRFcircuitlikemixerBipolartransistorscanprovidespeed，currentdrivingcapabilityandlow—noiseperformance，Bycombiningbothtechnologiesonthesam

4、echip，theperformanceofthecircuitCanbegreatlyimprovedMostexistingBiCMOSprocessescombinehighperformancebipolartransistorswithMOSFETsthisresultsinarathercomplexandexpensiveprocessduetothetechnologicalincompatibilityofthetwo

5、typesoftransistorsAmoreeconomicalsolutionwouldbetousetheparasiticbipolartransistors，whichareinherentlyavailableinCMOSprocessInthispaperadvancedlateralandverticalbipolartransistorshavebeendesignedandfabricatedbySMIC130nma

6、nd90nmRFCMOSprocessTheperformanceofthosenovelbipolartransistorshavebeenimprovedthroughtheoptimizationofdevicestructureandfabricationprocess，thebasewidthofthedesignedlateralbipolartransistorcanbereducedtotheleveloflOOnmes

7、peciallyin90nmRFCMOSprocessThoseadvancedbipolartransistorscanbeusedincircuitapplicationstoimprovetheperformanceandlowerthecost，andtheycanalsobeveryhelpfulinthedesignofRFESDprotectioncircuitThemainworkincludedinthispaper：

8、(1)Designofnovellateralandverticalbipolartransistor，novellateralandverticalCMOSbipolartransistorhavebeendesignedandfabricatedbytheSMIC130nmand90nmRFCMOSprocess(2)Testandcharacterizationofthedesignednovelbipolartransistor

9、s，IVperformanceofthebipolartransistorsondifferentconditionshasbeencharacterizedTheeffectsoftransistorstructure，basedopingconcentration，basewidth(featuresize)，theshapeandareaofemitteronthecommonemittercurrentgainhavebeens