1.244ghz、0.25μmcmos工藝可變分頻比鎖相環(huán)倍頻器設計

1、東南大學碩士學位論文1.244GHz、0.25μmCMOS工藝可變分頻比鎖相環(huán)倍頻器設計姓名：陳紅林申請學位級別：碩士專業(yè)：電路與系統(tǒng)指導教師：王志功20040301AbstractWiththerapiddevelopmentoftelecommunicationnetworks，computernetworksandIntemet，itisurgenttobuildinformationsuperhighwayOptic—fiber

2、communicationsystemsaretheprincipalpartsofinformationsuperhighwayforitsmeritssuchasgreatcapacitylongtransmitdistance，economizingenergysource，antiinterferenceandantiradiationetcVSR(ve巧ShortReach)hasofferedakindoflow—costs

3、hortdistance，largecapacityinterconnectedwayfornetworkoperatorasonekindoffiberopticcommunication，SOhaveextremelywidemarketprospectsAmonolithicclocksynthesisPLL，whichisexpectedtoapplytoVSRsystem，hasbeendesignedandcharacter

4、izedinthispaperThePLLconsistsofaringoscillatorafrequencydivider，aphase／frequencydetectorachargepumpandaloopfilterThefactorofthefrequencydividerisprogrammableAllcellshavedifferentialarchitectureAtthemomentmostofRFchipsand

5、ultrahigh—speedcircuitsarebasedontechnologiessuchasGaAs，BipolarSi，BiCMOSandSOonWiththedevelopmenttowardsubmicronanddeepsubmicrontechnologies，CMOSwilltakemoreandmoreimportantroleinthefieldofRFICandultrahigh—speedICdesignb

6、ecauseitslowcostandeasyofimplementationHencethefrequencysynthesizerhasbeendesignedinTSMCO25lxmCMOStechnologyThispaperintroducesthedesignprocessesandfinaltestresultsofabovementionedcircuitindetailaccordingtotheorderofcirc

7、uitdesign，layoutdesign，processtotestAllcircuitundergoessimulation，accordwiththedesignrequirement，andthelayoutshavebeendeliveredtothechipmanufacturerandsuccessfullyfabricatedThemeasureresultsofthechipsetvalidateourdesigns