數(shù)字溫度計(jì)外文翻譯

1、<p>　　附錄二 外文資料翻譯</p><p><b>　　資料原文</b></p><p><b>　　DS18B20</b></p><p>　　Programmable Resolution</p><p>　　Wire Digital Thermometer</p>

2、<p>　　DESCRIPTION</p><p>　　The DS18B20 Digital Thermometer provides 9 to 12–bit centigrade temperature measurements and has an alarm function with nonvolatile user-programmable upper and lower trigger

3、points. The DS18B20 communicates over a 1-Wire bus that by definition requires only one data line (and ground) for communication with a central microprocessor. It has an operating temperature range of –55℃ to +125°C

4、 and is accurate to ±0.5℃ over the range of –10℃ to +85℃. In addition, the DS18B20 can derive power directly fr</p><p>　　Each DS18B20 has a unique 64-bit serial code, which allows multiple DS18B20s to f

5、unction on the same 1–wire bus; thus, it is simple to use one microprocessor to control many DS18B20s distributed over a large area. Applications that can benefit from this feature include HVAC environmental controls,tem

6、perature monitoring systems inside buildings, equipment ormachinery, and process monitoring and control systems.</p><p><b>　　OVERVIEW</b></p><p>　　Figure 1 shows a block diagram of t

7、he DS18B20, and pin descriptions are given in Table 1. The 64-bit ROM stores the device’s unique serial code. The scratchpad memory contains the 2-byte temperature register that stores the digital output from the tempera

8、ture sensor. In addition, the scratchpad provides access to the 1-byte upper and lower alarm trigger registers (TH and TL), and the 1-byte configuration register. The configuration register allows the user to set the res

9、olution of the temperatur</p><p>　　The DS18B20 uses Dallas’ exclusive 1-Wire bus protocol that implements bus communication using one control signal. The control line requires a weak pullup resistor since al

10、l devices are linked to the bus via a 3-state or open-drain port (the DQ pin in the case of the DS18B20). In this bus system, the microprocessor (the master device) identifies and addresses devices on the bus using each

11、device’s unique 64-bit code. Because each device has a unique code, the number of devices that can be addres</p><p>　　Another feature of the DS18B20 is the ability to operate without an external power supply

12、. Power is instead supplied through the 1-Wire pullup resistor via the DQ pin when the bus is high. The high bus signal also charges an internal capacitor (Cpp), which then supplies power to the device when the bus is lo

13、w. This method of deriving power from the 1-Wire bus is referred to as “parasite power.” As an alternative, the DS18B20 may also be powered by an external supply on VDD.</p><p>　　OPERATION — MEASURING TEMPER

14、ATURE</p><p>　　The core functionality of the DS18B20 is its direct-to-digital temperature sensor. The resolution of the temperature sensor is user-configurable to 9, 10, 11, or 12 bits, corresponding to incr

15、ements of 0.5℃, 0.25℃, 0.125℃, and 0.0625℃, respectively. The default resolution at power-up is 12-bit. The DS18B20 powers-up in a low-power idle state; to initiate a temperature measurement and A-to-D conversion, the ma

16、ster must issue a Convert T [44h] command. Following the conversion, the resulting therm</p><p>　　POWERING THE DS18B20</p><p>　　The DS18B20 can be powered by an external supply on the VDD pin, o

17、r it can operate in “parasite power”mode, which allows the DS18B20 to function without a local external supply. Parasite power is very useful for applications that require remote temperature sensing or that are very spac

18、e constrained. Figure 1 shows the DS18B20’s parasite-power control circuitry, which “steals” power from the 1-Wire bus via the DQ pin when the bus is high. The stolen charge powers the DS18B20 while the bus is high</p

19、><p>　　The DS18B20 can also be powered by the conventional method of connecting an external power supply to the VDD pin, as shown in Figure 5. The advantage of this method is that the MOSFET pullup is not requi

20、red, and the 1-Wire bus is free to carry other traffic during the temperature conversion time. </p><p>　　The use of parasite power is not recommended for temperatures above +100℃ since the DS18B20 may not be

21、 able to sustain communications due to the higher leakage currents that can exist at these temperatures. For applications in which such temperatures are likely, it is strongly recommended that the DS18B20 be powered by a

22、n external power supply. </p><p>　　In some situations the bus master may not know whether the DS18B20s on the bus are parasite powered or powered by external supplies. The master needs this information to de

23、termine if the strong bus pullup should be used during temperature conversions. To get this information, the master can issue a Skip ROM [CCh] command followed by a Read Power Supply [B4h] command followed by a “read tim

24、e slot”. During the read time slot, parasite powered DS18B20s will pull the bus low, and externally powered </p><p><b>　　MEMORY</b></p><p>　　The DS18B20’s memory is organized as show

25、n in Figure 7. The memory consists of an SRAM scratchpad with nonvolatile EEPROM storage for the high and low alarm trigger registers (TH and TL) and configuration register. Note that if the DS18B20 alarm function is not

26、 used, the TH and TL registers can serve as general-purpose memory. All memory commands are described in detail in the DS18B20 FUNCTION COMMANDS section.</p><p>　　Byte 0 and byte 1 of the scratchpad contain

27、the LSB and the MSB of the temperature register, respectively. These bytes are read-only. Bytes 2 and 3 provide access to TH and TL registers. Byte 4 contains the configuration register data, which is explained in detail

28、 in the CONFIGURATION REGISTER section of this datasheet. Bytes 5, 6, and 7 are reserved for internal use by the device and cannot be overwritten; these bytes will return all 1s when read.</p><p>　　Byte 8 of

29、 the scratchpad is read-only and contains the cyclic redundancy check (CRC) code for bytes 0 through 7 of the scratchpad. The DS18B20 generates this CRC using the method described in the CRC GENERATION section.</p>

30、<p>　　Data is written to bytes 2, 3, and 4 of the scratchpad using the Write Scratchpad [4Eh] command; the data must be transmitted to the DS18B20 starting with the least significant bit of byte 2. To verify data

31、integrity, the scratchpad can be read (using the Read Scratchpad [BEh] command) after the data is written. When reading the scratchpad, data is transferred over the 1-Wire bus starting with the least significant bit of b

32、yte 0. To transfer the TH, TL and configuration data from the scratchpad </p><p>　　Data in the EEPROM registers is retained when the device is powered down; at power-up the EEPROM data is reloaded into the c

33、orresponding scratchpad locations. Data can also be reloaded from EEPROM to the scratchpad at any time using the Recall E2 [B8h] command. The master can issue read time slotsfollowing the Recall E2 command and the DS18B2

34、0 will indicate the status of the recall by transmitting 0 while the recall is in progress and 1 when the recall is done.</p><p>　　CRC GENERATION</p><p>　　CRC bytes are provided as part of the D

35、S18B20’s 64-bit ROM code and in the 9th byte of the scratchpad memory. The ROM code CRC is calculated from the first 56 bits of the ROM code and is contained in the most significant byte of the ROM. The scratchpad CRC is

36、 calculated from the data stored in the scratchpad, and therefore it changes when the data in the scratchpad changes. The CRCs provide the bus master with a method of data validation when data is read from the DS18B20. T

37、o verify that data ha</p><p>　　The equivalent polynomial function of the CRC (ROM or scratchpad) is:</p><p>　　CRC = X8 + X5 + X4 + 1</p><p>　　The bus master can re-calculate the CRC

38、 and compare it to the CRC values from the DS18B20 using the polynomial generator shown in Figure 9. This circuit consists of a shift register and XOR gates, and the shift register bits are initialized to 0. Starting wit

39、h the least significant bit of the ROM code or the least significant bit of byte 0 in the scratchpad, one bit at a time should shifted into the shift register. After shifting in the 56th bit from the ROM or the most sign

40、ificant bit of byte 7</p><p>　　HARDWARE CONFIGURATION</p><p>　　The 1-Wire bus has by definition only a single data line. Each device (master or slave) interfaces to the data line via an open-dra

41、in or 3-state port. This allows each device to “release” the data line when the device is not transmitting data so the bus is available for use by another device. The 1-Wire port of the DS18B20 (the DQ pin) is open drain

42、 with an internal circuit equivalent to that shown in Figure 10.</p><p>　　The 1-Wire bus requires an external pullup resistor of approximately 5k?; thus, the idle state for the 1-Wire bus is high. If for any

43、 reason a transaction needs to be suspended, the bus MUST be left in the idle state if the transaction is to resume. Infinite recovery time can occur between bits so long as the 1-Wire bus is in the inactive (high) state

44、 during the recovery period. If the bus is held low for more than 480μs, all components on the bus will be reset.</p><p><b>　　資料翻譯</b></p><p><b>　　DS18B20</b></p>

45、<p><b>　　可編程分辨率的</b></p><p><b>　　單總線(xiàn)®數(shù)字溫度計(jì)</b></p><p><b>　　說(shuō)明</b></p><p>　　DS18B20 數(shù)字溫度計(jì)提供9-12 位攝氏溫度測(cè)量而且有一個(gè)由高低電平觸發(fā)的可編程的不因電源消失而改變的報(bào)警功能。D

46、S18B20通過(guò)一個(gè)單線(xiàn)接口發(fā)送或接受信息，因此在中央處理器和DS18B20 之間僅需一條連接線(xiàn)（加上地線(xiàn)）。它的測(cè)溫范圍為-55～＋125℃，并且在-10～＋85℃精度為±5℃。除此之外，DS18B20能直接從單線(xiàn)通訊線(xiàn)上汲取能量，除去了對(duì)外部電源的需求。</p><p>　　每個(gè) DS18B20 都有一個(gè)獨(dú)特的64 位序列號(hào)，從而允許多只DS18B20 同時(shí)連在一根單線(xiàn)總線(xiàn)上；因此，很簡(jiǎn)單就可以用一

47、個(gè)微控制器去控制很多覆蓋在一大片區(qū)域的DS18B20。這一特性在HVAC 環(huán)境控制、探測(cè)建筑物、儀器或機(jī)器的溫度以及過(guò)程監(jiān)測(cè)和控制等方面非常有用。</p><p><b>　　概覽</b></p><p>　　圖 1 是表示DS18B20 的方框圖，表1 已經(jīng)給出了引腳說(shuō)明。64 位只讀存儲(chǔ)器儲(chǔ)存器件的唯一片序列號(hào)。高速暫存器含有兩個(gè)字節(jié)的溫度寄存器，這兩個(gè)寄存器用來(lái)

48、存儲(chǔ)溫度傳感器輸出的數(shù)據(jù)。除此之外，高速暫存器提供一個(gè)直接的溫度報(bào)警值寄存器（TH和TL），和一個(gè)字節(jié)的的配置寄存器。配置寄存器允許用戶(hù)將溫度的精度設(shè)定為9，10，11 或12 位。TH,TL 和配置寄存器是非易失性的可擦除程序寄存器（EEPROM），所以存儲(chǔ)的數(shù)據(jù)在器件掉電時(shí)不會(huì)消失。</p><p>　　DS18B20通過(guò)達(dá)拉斯公司獨(dú)有的單總線(xiàn)協(xié)議依靠一個(gè)單線(xiàn)端口通訊。當(dāng)全部器件經(jīng)由一個(gè)3態(tài)端口或者漏極開(kāi)路端

49、口（DQ引腳在DS18B20上的情況下)與總線(xiàn)連接的時(shí)候，控制線(xiàn)需要連接一個(gè)弱上拉電阻。在這個(gè)總線(xiàn)系統(tǒng)中，微控制器（主器件）依靠每個(gè)器件獨(dú)有的64位片序列號(hào)辨認(rèn)總線(xiàn)上的器件和記錄總線(xiàn)上的器件地址。由于每個(gè)裝置有一個(gè)獨(dú)特的片序列碼,總線(xiàn)可以連接的器件數(shù)目事實(shí)上是無(wú)限的。單總線(xiàn)協(xié)議，包括指令的詳細(xì)解釋和“時(shí)序”見(jiàn)單總線(xiàn)系統(tǒng)節(jié)。</p><p>　　DS18B20的另一個(gè)功能是可以在沒(méi)有外部電源供電的情況下工作。當(dāng)總線(xiàn)

50、處于高電平狀態(tài)，DQ與上拉電阻連接通過(guò)單總線(xiàn)對(duì)器件供電。同時(shí)處于高電平狀態(tài)的總線(xiàn)信號(hào)對(duì)內(nèi)部電容（Cpp）充電，在總線(xiàn)處于低電平狀態(tài)時(shí)，該電容提供能量給器件。這種提供能量的形式被稱(chēng)為“寄生電源”。作為替代選擇，DS18B20同樣可以通過(guò)VDD引腳連接外部電源供電。</p><p><b>　　測(cè)溫操作</b></p><p>　　DS18B20的核心功能是它的直接讀數(shù)字

51、的溫度傳感器。溫度傳感器的精度為用戶(hù)可編程的9，10，11或12位，分別以0.5℃，0.25℃，0.125℃和0.0625℃增量遞增。在上電狀態(tài)下默認(rèn)的精度為12位。DS18B20啟動(dòng)后保持低功耗等待狀態(tài)；當(dāng)需要執(zhí)行溫度測(cè)量和AD轉(zhuǎn)換時(shí)，總線(xiàn)控制器必須發(fā)出[44h]命令。在那之后，產(chǎn)生的溫度數(shù)據(jù)以?xún)蓚€(gè)字節(jié)的形式被存儲(chǔ)到高速暫存器的溫度寄存器中，DS18B20繼續(xù)保持等待狀態(tài)。當(dāng)DS18B20由外部電源供電時(shí)，總線(xiàn)控制器在溫度轉(zhuǎn)換指令之后

52、發(fā)起“讀時(shí)序”（見(jiàn)單總線(xiàn)系統(tǒng)節(jié)），DS18B20正在溫度轉(zhuǎn)換中返回0,轉(zhuǎn)換結(jié)束返回1。如果DS18B20由寄生電源供電，除非在進(jìn)入溫度轉(zhuǎn)換時(shí)總線(xiàn)被一個(gè)強(qiáng)上拉拉高，否則將不會(huì)由返回值。寄生電源的總線(xiàn)要求在DS18B20 供電節(jié)詳細(xì)解釋。</p><p>　　DS18B20 供電</p><p>　　DS18B20可以通過(guò)從VDD引腳接入一個(gè)外部電源供電，或者可以工作于寄生電源模式，該模式允許

53、DS18B20工作于無(wú)外部電源需求狀態(tài)。寄生電源在進(jìn)行遠(yuǎn)距離測(cè)溫時(shí)是非常有用的。寄生電源的控制回路見(jiàn)圖1，當(dāng)總線(xiàn)為高電平時(shí)，寄生電源由單總線(xiàn)通過(guò)VDD引腳。這個(gè)電路會(huì)在總線(xiàn)處于高電平時(shí)偷能量，部分汲取的能量存儲(chǔ)在寄生電源儲(chǔ)能電容（Cpp）內(nèi)，在總線(xiàn)處于低電平時(shí)釋放能量以提供給器件能量。當(dāng)DS18B20處于寄生電源模式時(shí)，VDD引腳必須接地。</p><p>　　寄生電源模式下，單總線(xiàn)和Cpp在大部分操作中能提供充

54、分的滿(mǎn)足規(guī)定時(shí)序和電壓的電流（見(jiàn)直流電特性和交流電特性節(jié)）給DS18B20。然而，當(dāng)DS18B20正在執(zhí)行溫度轉(zhuǎn)換或從高速暫存器向EPPROM傳送數(shù)據(jù)時(shí)，工作電流可能高達(dá)1.5mA。這個(gè)電流可能會(huì)引起連接單總線(xiàn)的弱上拉電阻的不可接受的壓降，這需要更大的電流，而此時(shí)Cpp無(wú)法提供。為了保證DS18B20由充足的供電，當(dāng)進(jìn)行溫度轉(zhuǎn)換或拷貝數(shù)據(jù)到EEPROM操作時(shí)，必須給單總線(xiàn)提供一個(gè)強(qiáng)上拉。用漏極開(kāi)路把I/O直接拉到電源上就可以實(shí)現(xiàn)，見(jiàn)圖4

55、。在發(fā)出溫度轉(zhuǎn)換指令[44h]或拷貝暫存器指令[48h]之后，必須在至多10us之內(nèi)把單總線(xiàn)轉(zhuǎn)換到強(qiáng)上拉，并且在溫度轉(zhuǎn)換時(shí)序(tconv)或拷貝數(shù)據(jù)時(shí)序(ter=10 ms)必須一直保持為強(qiáng)上拉狀態(tài)。當(dāng)強(qiáng)上拉狀態(tài)保持時(shí)，不允許有其它的動(dòng)作。</p><p>　　對(duì)DS18B20供電的另一種傳統(tǒng)辦法是從VDD引腳接入一個(gè)外部電源，見(jiàn)圖5。這樣做的好處是單總線(xiàn)上不需要強(qiáng)上拉。而且總線(xiàn)不用在溫度轉(zhuǎn)換期間總保持高電平。&

56、lt;/p><p>　　溫度高于100℃時(shí)，不推薦使用寄生電源，因?yàn)镈S18B20在這種溫度下表現(xiàn)出的漏電流比較大，通訊可能無(wú)法進(jìn)行。在類(lèi)似這種溫度的情況下，強(qiáng)烈推薦使用DS18B20的VDD引腳。</p><p>　　對(duì)于總線(xiàn)控制器不直到總線(xiàn)上的DS18B20是用寄生電源還是用外部電源的情況，DS18B20 預(yù)備了一種信號(hào)指示電源的使用意圖?？偩€(xiàn)控制器發(fā)出一個(gè)Skip ROM指令[CCh]，

57、然后發(fā)出讀電源指令[B4h]，這條指令發(fā)出后，控制器發(fā)出讀時(shí)序，寄生電源會(huì)將總線(xiàn)拉低，而外部電源會(huì)將總線(xiàn)保持為高。如果總線(xiàn)被拉低，總線(xiàn)控制器就會(huì)知道需要在溫度轉(zhuǎn)換期間對(duì)單總線(xiàn)提供強(qiáng)上拉。</p><p><b>　　存儲(chǔ)器</b></p><p>　　DS18B20的存儲(chǔ)器結(jié)構(gòu)示于圖7。存儲(chǔ)器有一個(gè)暫存SRAM和一個(gè)存儲(chǔ)高低報(bào)警觸發(fā)值TH 和TL 的非易失性電可擦除E

58、EPROM組成。注意當(dāng)報(bào)警功能不使用時(shí)，TH和TL寄存器可以被當(dāng)作普通寄存器使用。所有的存儲(chǔ)器指令被詳述于DS18B20功能指令節(jié)。</p><p>　　位0和位1為測(cè)得溫度信息的LSB和MSB。這兩個(gè)字節(jié)是只讀的。第2和第3字節(jié)是TH和TL的拷貝。位4 包含配置寄存器數(shù)據(jù)，其被詳述于配置寄存器節(jié)。位5，6 和7被器件保留，禁止寫(xiě)入；這些數(shù)據(jù)在讀回時(shí)全部表現(xiàn)為邏輯1。</p><p>　　

59、高速暫存器的位8是只讀的，包含以上八個(gè)字節(jié)的CRC碼，CRC的執(zhí)行方式如CRC發(fā)生器節(jié)所述。</p><p>　　數(shù)據(jù)通過(guò)寫(xiě)暫存器指令[4Eh]寫(xiě)入高速暫存器的2，3和4位；數(shù)據(jù)必須以位2為最低有效位開(kāi)始傳送。為了完整的驗(yàn)證數(shù)據(jù)，高速暫存器能夠在數(shù)據(jù)寫(xiě)入后被讀?。ㄊ褂米x暫存器指令[BEh]）。在讀暫存器時(shí)，數(shù)據(jù)以位0為最低有效位從單總線(xiàn)移出?？偩€(xiàn)控制器傳遞從暫存器到EEPROMTH,TL和配置數(shù)據(jù)必須發(fā)出拷貝暫存

60、器指令[48h]。</p><p>　　EEPROM 寄存器中的數(shù)據(jù)在器件掉電時(shí)仍然保存；上電時(shí)，數(shù)據(jù)被載入暫存器。數(shù)據(jù)也可以通過(guò)召回EEPROM命令從暫存器載入EEPROM?？偩€(xiàn)控制器在發(fā)出這條命令后發(fā)出讀時(shí)序，DS18B20返回0表示正在召回中，返回1表示操作結(jié)束。</p><p><b>　　CRC 發(fā)生器</b></p><p>　　C

61、RC字節(jié)作為DS18B2064 位ROM的一部分存儲(chǔ)在存儲(chǔ)器中。CRC碼由ROM的前56位計(jì)算得到，被包含在ROM的重要字節(jié)當(dāng)中。CRC由存儲(chǔ)在存儲(chǔ)器中的數(shù)據(jù)計(jì)算得到，因此當(dāng)存儲(chǔ)器中的數(shù)據(jù)發(fā)生改變時(shí)，CRC的值也隨之改變。</p><p>　　CRC能夠在總線(xiàn)控制器讀取DS18B20時(shí)進(jìn)行數(shù)據(jù)校驗(yàn)。為校驗(yàn)數(shù)據(jù)是否被正確讀取，總線(xiàn)控制器必須用接受到的數(shù)據(jù)計(jì)算出一個(gè)CRC 值，和存儲(chǔ)在DS18B20 的64 位ROM

62、 中的值（讀ROM 時(shí)）或DS18B20 內(nèi)部計(jì)算出的8 位CRC 值（讀存儲(chǔ)器時(shí)）進(jìn)行比較。如果計(jì)算得到的CRC值和讀取出來(lái)的CRC值相吻合，數(shù)據(jù)被無(wú)錯(cuò)傳輸。CRC 值的比較以及是否進(jìn)行下一步操作完全由總線(xiàn)控制器決定。當(dāng)在DS18B20中存儲(chǔ)的或由其計(jì)算到CRC值和總線(xiàn)控制器計(jì)算的值不相符時(shí)，DS18B20內(nèi)部并沒(méi)有一個(gè)能阻止命令序列進(jìn)行的電路。</p><p>　　CRC的計(jì)算等式如下：</p>

63、<p>　　CRC = X8 + X5 + X4 + 1</p><p>　　單總線(xiàn)CRC可以由一個(gè)由移位寄存器和XOR門(mén)構(gòu)成的多項(xiàng)式發(fā)生器來(lái)產(chǎn)生，見(jiàn)圖9。這個(gè)回路包括一個(gè)移位寄存器和幾個(gè)XOR 門(mén)，移位寄存器的各位都被初始化為0。從ROM中的最低有效位或暫存器中的位0開(kāi)始，一次一位移入寄存器。在傳輸了56位ROM中的數(shù)據(jù)或移入了暫存器的位7后，移位寄存器中就存儲(chǔ)了CRC值。下一步，CRC的值必須被循

64、環(huán)移入。此時(shí)，如果計(jì)算得到的CRC是正確的，移位寄存器將復(fù)0。</p><p><b>　　硬件結(jié)構(gòu)</b></p><p>　　單總線(xiàn)系統(tǒng)只有一條定義的信號(hào)線(xiàn)。每一個(gè)總線(xiàn)上的器件必須是漏極開(kāi)路或三態(tài)輸出。這樣的系統(tǒng)允許每一個(gè)掛在總線(xiàn)上的區(qū)間都能在適當(dāng)?shù)臅r(shí)間驅(qū)動(dòng)它。DS18B20的單總線(xiàn)端口（DQ引腳）是漏極開(kāi)路式的。</p><p>　　單總