無線收發(fā)機中整數(shù)分頻器和RSSI的設(shè)計與實現(xiàn).pdf

1、東南大學(xué)碩士學(xué)位論文無線收發(fā)機中整數(shù)分頻器和RSSI的設(shè)計與實現(xiàn)姓名：熊振華申請學(xué)位級別：碩士專業(yè)：電子科學(xué)與技術(shù)；電路與系統(tǒng)指導(dǎo)教師：李智群20110307AbstractAbstractnefrequencysynthesizer(FS)isakeybuildingblockintheRadioFrequency(RF)transceiverItcarlprovidestableandprogrammablelocaloscilla

2、tor(LO)signalstoRFtransceiversItsperformancesdeterminethewholeperformancesofRFtransceivernefrequencydivider(FD)isanimportantbuildingblockinFS，itmakesFSpossibletoprovidemultichannelsignalsThus，itissignificanttodesignahi曲s

3、peedlowpowerandalterabledivideratioFDInthereceiverthereceivedsignalstrengthindicator(RSSI)isusedtoensuredealingwithdifferentstrengthsignaltoavoidreceiverinvalidThispaperliststhedesigntargetofFDbasedontheperformancesofFSs

4、ystemARercomparedsomestructuresofFD，48GHzl：2andprogrammabledividersapplyingforwirelesssensornetwork(WSN)aredesignedusingSMICO189mCMOSTechnologyInl：2FDcircuitSCFL1archesarcusedtoreachwidedividerangeandstabledivideratioThe

5、programmabledividerisbasedonswallowpulsecounterforitssimplecircuitsflexibledivideratioandeasyto璐emixedsignalcircuitdesignmethodteducetimenepaperpresentsthecircuitsdesign，layoutdesignsimulations11hechipsweretapedoutandtes

6、ted111etestsshowthe1：2FDandprogrammabledividercanworkintherangeof46GHzunder18supplyvoltagenlecorecircuitsofthesetwoblockshavethecurrentof13mAand43mA，withareaofi00x601am2and200x100pmzseparatelyWhentheinputofprogrammabledi

7、videris481GHztheoutputis2MHzandtheoutputphasenoiseis12417dBc／Hz@100kHzAtthesametime，another165GHzprogrammabledividerappliedforSiliconImagingArraybyIBM90nmCMOSThedividerisbasedonthestructureofswallowpulsecounterBut，duetot

8、helackofdigitalstandardcellinthisprocessthecircuitsaredesignedwithfuUcustommethodTheprogrammablecounteremployedastructurewithbinaryasynchronouscounterThepaperpresentsthecircuitsdesign，layoutdesign，siIIlHlali伽sAndthechipw

9、astapedoutThepostsimulationsdisplaythedividercanrealizevariabledivideratiofrom273to330，workinginthefrequencyrangeofl3一l7GHzunder12VsupplyvoltageThechipoccupies500x485I_un“MoreoveraRSSIforWSNwithTSMC018pmCMOSispresentedin

10、thepaperThecircuitscontainlimitingamplifiersandrectifiertealizelogarithmicamplifierThiskindofstructurehasgoodtemperatureandprocessdependence11忙paperpresentsthecircuitsdesign，layoutdesign，simulationsThechipsweretapedoutan

11、dmeasuredunder18Vsupplyvoltage11hetotalcurrentis19mAAtfrequencyof2MHzthedetectionrangeis677dBm，withi5dBnonlinearityerrorT1ledetectionslopeisbeyond15mV／dBTheareais700560pm2InconclusiontheintegerdividerandRSSIforWSNhavebee

12、nusedintheRFtransceiverchipsofWSNsystemneprogrammabledividerappliedforSiliconImagingArrayisavailableKeywords：FrequencySynthesizer；i：2FrequencyDivider；Trigger；ProgrammableDivider；ReceivedSignalStrengthIndicator；LimitingAm