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1、外文原文TheAVRcecombinesarichinstructionsetwith32generalpurposewkingregisters.Allthe32registersaredirectlyconnectedtotheArithmeticLogicUnit(ALU)allowingtwoindependentregisterstobeaccessedinonesingleinstructionexecutedinonecl
2、ockcycle.TheresultingarchitectureismecodeefficientwhileachievingthroughputsuptotentimesfasterthanconventionalCISCmicrocontrollers.TheATmega16providesthefollowingfeatures:16KbytesofInSystemProgrammableFlashProgrammemywith
3、ReadWhileWritecapabilities512bytesEEPROM1KbyteSRAM32generalpurposeIOlines32generalpurposewkingregistersaJTAGinterfacefBoundaryscanOnchipDebuggingsupptprogrammingthreeflexibleTimerCounterswithcomparemodesInternalExternalI
4、nterruptsaserialprogrammableUSARTabyteientedTwowireSerialInterfacean8channel10bitADCwithoptionaldifferentialinputstagewithprogrammablegain(TQFPpackageonly)aprogrammableWatchdogTimerwithInternalOscillatanSPIserialptsixsof
5、twareablepowersavingmodes.TheIdlemodestopstheCPUwhileallowingtheUSARTTwowireinterfaceADConverterSRAMTimerCountersSPIptinterruptsystemtocontinuefunctioning.ThePowerdownmodesavestheregistercontentsbutfreezestheOscillatdisa
6、blingallotherchipfunctionsuntilthenextExternalInterruptHardwareReset.InPowersavemodetheAsynchronousTimercontinuestorunallowingtheusertomaintainatimerbasewhiletherestofthedeviceissleeping.TheADCNoiseReductionmodestopstheC
7、PUallIOmodulesexceptAsynchronousTimerADCtominimizeswitchingnoiseduringADCconversions.InStbymodethecrystalresonatOscillatisrunningwhiletherestofthedeviceissleeping.Thisallowsveryfaststartupcombinedwithlowpowerconsumption.
8、InExtendedStbymodeboththemainOscillattheAsynchronousTimercontinuetorun.WhenconfiguredasaSlavetheSPIinterfacewillremainsleepingwithMISOtristatedaslongastheSSpinisdrivenhigh.InthisstatesoftwaremayupdatethecontentsoftheSPID
9、ataRegisterSPDRbutthedatawillnotbeshiftedoutbyincomingclockpulsesontheSCKpinuntiltheSSpinisdrivenlow.AsonebytehasbeencompletelyshiftedtheendofTransmissionFlagSPIFisset.IftheSPIInterruptEnablebitSPIEintheSPCRRegisterisset
10、aninterruptisrequested.TheSlavemaycontinuetoplacenewdatatobesentintoSPDRbefereadingtheincomingdata.ThelastincomingbytewillbekeptintheBufferRegisterflateruse.VS1003isasinglechipMP3WMAIaudiodecoderADPCMencoder.Itcontainsah
11、ighperfmanceproprietarylowpowerDSPprocessceVSDSP4wkingdatamemy5KiBinstructionRAM0.5KiBdataRAMfuserapplicationsserialcontrolinputdatainterfaces4generalpurposeIOpinsanUARTaswellasahighqualityvariablesampleratemonoADCstereo
12、DACfollowedbyanearphoneamplifieragroundbuffer.VS1003receivesitsinputbitstreamthroughaserialinputbuswhichitlistenstoasasystemslave.Theinputstreamisdecodedpassedthroughadigitalvolumecontroltoan18bitoversamplingmultibitsigm
13、adeltaDAC.Thedecodingiscontrolledviaaserialcontrolbus.InadditiontothebasicdecodingitispossibletoaddapplicationspecificfeatureslikeDSPeffectstotheuserRAMmemy.(1)SPIBusesTheSPIBusthatwasiginallyusedinsomeMotoladeviceshasbe
14、enusedfbothVS1003’sSerialDataInterfaceSDI(Chapters7.48.4)SerialControlInterfaceSCI.(2)DataRequestPinDREQTheDREQpinsignalisusedtosignalifVS1003’sFIFOiscapableofreceivingdata.IfDREQishighVS1003cantakeatleast32bytesofSDIdat
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