外文翻譯--10gbs的高性能pin和apd光接收器

1、<p>　　High Performance 10 Gb/s PIN and APD Optical Receivers</p><p><b>　　Abstract </b></p><p>　　The increasing market demand for high-speed optical- transmission systems at rate

2、s of 10 Gb/s has resulted in technical challenges for suppliers of high-performance, manufacturable opto-electronic components and systems. In particular, the performance of the InP semiconductor devices, integrated ci

3、rcuits (ICs) and hybrid IC modules strongly influences the achievable transmission capability.</p><p>　　An optical receiver design is presented which incorporates an InP-based p-i-n (positive-intrinsic-nega

4、tive) photodetecto(PD) or avalanche photodetector (APD) and a GaAs high electron mobility transistor (HEMT) pre-amplifier integrated circuit. Several aspects of the receiver design are presented, including the p-i-n PD

5、and APD structures and performance, pre-amplifier performance, hybrid module layout and electrical simulation and results. The use of analytical techniques and theory commonly us</p><p>　　Introduction </p

6、><p>　　Over the past 15 years the demand has continued to increase for higher speed and higher performing opto- electronic components. Components designed to operate at data rates of 155 Mb/s through 1 Gb/s ar

7、e now used in high volume, are manufactured with high yields, and are available from several suppliers. Components designed for 2.5 Gb/s are fast approaching this manufacturing status as well. The emphasis now for new op

8、to-electronic product development centers around performance requirements at </p><p>　　The optical receiver represents one of the key components in optical-fiber based communication systems, and is generally

9、 considered as a component, or module, which is available with specified levels of electrical functionality or integration. The basic elements of an optical receiver module are a photodetector, pre-amplifier, limiting or

10、 AGC(automatic gain control) amplifier, and clock and data recovery circuitry. At data rates of 2.5 Gb/s and below, the system designer can currently purchase </p><p>　　In many multi-element systems and cir

11、cuits the performance is strongly influenced by those elements which are located near the input of the system or circuit. This is certainly true in a digital optical receiver where the performance of the photodetector a

12、nd pre-amplifier elements will have a strong impact on receiver and system performance. In addition to the individual performance of these two elements, the electrical and physical design of the interface between them is

13、 equally critical. </p><p>　　At speeds of 10 Gb/s, the current focus for suppliers of optical receivers is the development of modules, which incorporate the photodetector and pre-amplifier elements. Naturall

14、y as time progresses, the additional electrical functions will be incorporated into the modules as well. This paper focuses on the design and characterization of 10 Gb/s optical receiver modules that incorporate the phot

15、odetector and pre-amplifier elements.</p><p>　　Optical Receiver Basics </p><p>　　Before considering 10 Gb/s receiver design a brief review is presented of optical receivers for digital applicat

16、ions. A basic schematic of an optical receiver front-end is shown in Figure I. The schematic includes the photodetector and pre- amplifier elements.</p><p>　　The key perfomance requirements of an optical rec

17、eiver are high sensitivity, wide dynamic range and adequate bandwidth for the intended application. The purpose of the PD is to convert the incident optical signal to an electrical current. The photodiode should have the

18、 following performance characteristics: high responsivity (quantum efficiency), low dark current, low capacitance and wide bandwidth. For applications at optical wavelengths of 1310nm and 1550 nm, high quantum efficien

19、cy InGaAs /</p><p>　　The purpose of the pre-amplifier is to convert the photocurrent from the PD into a usable voltage that can be further processed. The common pre-amplifier technology used in optical recei

20、vers is transimpedance amplification, (TIA) due to its optimum trade-off between noise, dynamic range and bandwidth. Other types of pre-amplifiers include high-impedance and low-impedance (e.g. 50Ω) designs.</p>&

21、lt;p>　　p-i-n Photodetectors</p><p>　　Our p-i-n photodiode is a double-heterojunction structure grown on an n+-InP substrate and consists of an n+ -1nP buffer layer, an n--InGaAs active layer, and an n InP

22、 cap layer. The buffer growth precedes the active layer growth to provide a surface with fewer defects than exist on the bare substrate surface. The In0.53Ga0 .47As active layer is lattice-matched to InP and, with a ba

23、ndgap εg ~ 0.75 eV, is sensitive to light with wavelengths shorter than ~1.65 µm. The device exhibits a short-wa</p><p>　　Several of the critical device characteristics pose conflicting design constrai

24、nts that must be optimized for good high frequency performance. Of primary importance is the ability to achieve sufficient 3-dB bandwidth. The standard p- i-n diode has two fundamental bandwidth limitations: (i) finite c

25、arrier transit time and (ii) RC roll-off. The finite transit time taken by photon-induced carriers to traverse the active region can be shortened by reducing the thickness of the active region, but onl</p><p&g

26、t;　　For 10 Gb/s performance, the conflicting requirements just described can be adequately resolved using a device diameter of 30 um. In this case, an active layer width Wa ~ 2.3 um gives rise to average transit times of

27、 about 25 ps implying a maximum bandwidth f3-dB ~ 18 GHz. The resulting capacitance of ~ 0.15 pF contributes a bandwidth limitation of f3-dB ~ 21 GHz assuming a 50Ωload. (Note that low contact resistance is yet another d

28、evice requirement necessary for minimizing RC bandwidth limitati</p><p>　　Avalanche Photodetectors</p><p>　　The design of an avalanche photodiode for use at 10 Gb/s is considerably more difficul

29、t than for a p-i-n diode, but the benefits to receiver sensitivity can be substantial. The utility of the APD is that it provides a means of circumventing the basic quantum limitation of the p-i-n diode, which dictates t

30、hat each photon can generate only a single electron-hole pair. The APD structure is designed to create a region of electric field sufficiently high that a single carrier is accelerated enough to</p><p>　　All

31、 InGaAs-InP APDs employ a separate absorption and multiplication (SAM) structure (see Fig. 2b) since high fields in the InGaAs absorption region would induce large tunneling currents before the onset of the avalanche eff

32、ect. The low- doped InGaAs absorption and InP multiplication regions are spatially separated by a layer of n-doped InP used to maintain low field in the InGaAs and high field in the InP. The InP multiplication region is

33、 terminated by a p+-n- junction in InP created by a diffu</p><p>　　APD design is complicated by a number of factors. Foremost among these is the difficulty in controlling premature avalanche breakdown at th

34、e edge of the device.The geometry of planar diffused junctions includes inherent curvature at the junction periphery. This curvature typically causes locally enhanced electric fields, and the consequent enhanced avalanc

35、he at the junction periphery leads to an undesirable non-uniformity in the multiplication profile across the device. To solve this problem,</p><p>　　Achieving high bandwidth APD performance involves the sam

36、e transit time and RC limitations described for the p-i-n diode. However, there is an additional bandwidth constraint imposed by the avalanche process itself in the form of a fixed gain-bandwidth (G-BW) product. The ca

37、rrier acceleration and impact ionization involved in creating avalanche gain require an "avalanche build-up" time proportional to the gain, so the higher the operating gain is, the lower will be the device b

38、andwidth. (No</p><p>　　A very attractive attribute of our APD design is the fact that it is based on well-established processes identical to those used in fabricating planar p-i-n diodes. This can be expecte

39、d to result in favorable production yields and extremely high- reliability devices. We have confirmed that our 2.5 Gb/s APDs (based on a structure similar to that described above for the 10 Gb/s device) have reliabili

40、ty performance comparable to p-i-n diodes, and initial lifetesting on our 10 Gb/s APDs has prov</p><p>　　Conclusions</p><p>　　The design of manufacturable optical receiver modules has been pres

41、ented for 10 Gb/s applications. Both a p-i-n or APD detector can be used, depending on sensitivity requirements. The design and fabrication of the planar InGaAs-InP photodetectors was presented along with a physical desc

42、ription of the optical module. A detailed electrical analysis based on microwave CAD simulation was presented with an emphasis on the identification of the critical circuit elements that effect the microwave perfo</p&

43、gt;<p>　　作者：Jim Rue, Mark Mer, Nitish Agrawal, Stephen Bay and William Sherry</p><p><b>　　國籍：美國</b></p><p>　　出處：Electronic Components and Technology Conference，1999.</p>

44、;<p>　　10Gb/s的高性能PIN和APD光接收器</p><p><b>　　摘要</b></p><p>　　隨著市場需求對傳輸速率為10Gb/s的高速光纖系統(tǒng)日益增長，使之對生產(chǎn)高性能，制造光電元件和系統(tǒng)的供應商的提出了更高的技術要求。特別是InP半導體器件，集成電路（IC）電路和混合IC模塊的性能，對實現(xiàn)傳輸能力有著的強烈影響。</p

45、><p>　　在一種光接收機的設計上，人們提出結合采用基于InP基腳的p-i-n結光電探測器或雪崩光電探測器（APD）和砷化鎵高電子遷移率晶體管（HEMT）的前置放大器集成電路。光接受器的設計，包括在p-i-n結光電探測器和APD的結構和性能，前置放大器性能，混合動力模塊布局和電氣模擬結果的幾個方面的設計。經(jīng)常強調在微波放大器及電路設計中使用的分析技術和理論。使接收器的測試結果與預測的理論性能接近一致。</p&

46、gt;<p><b>　　引言</b></p><p>　　在過去15年中，人們對于速度更高和性能更高的光電組件的需求一直在不斷增加。設計出來的數(shù)據(jù)傳輸速率為155Mb/s與1Gb/s的光電組件現(xiàn)在正在在被大批量使用，并且其容易生產(chǎn)且產(chǎn)量高，容易從幾個供應商中得到。設計的傳輸速率為2.5千兆/秒的光電組件的生產(chǎn)同樣快速達到了這個狀況?，F(xiàn)在光電產(chǎn)品研發(fā)中心新的重點是研發(fā)傳輸速率性

47、能要求約為10Gb/s和更高的元件。</p><p>　　光接收器是基于光纖通信系統(tǒng)的關鍵部件之一，一般被認為這是裝備在指定的電氣功能或一體化水平設備的組件或模塊。光接收器模塊的基本元件是光探測器，前置放大器，限制或AGC（自動增益控制）放大器，時鐘和數(shù)據(jù)恢復電路。</p><p>　　如果從一個離散探測器模塊到完全集成的時鐘和數(shù)據(jù)恢復模塊的數(shù)據(jù)傳輸速率要求在2.5Gb/s及以下的，系統(tǒng)設

48、計師目前可以購買在各種水平的集成光接收機的基本元件。 </p><p>　　在許多元件系統(tǒng)和電路的性能受到那些位于附近的輸入系統(tǒng)或電路的元件的強烈影響。這是確實存在的，在數(shù)字光接收機上的光電探測器和前置放大器元件的性能將會對接收器和系統(tǒng)性能產(chǎn)生強烈影響。除了這兩種元件的獨特影響外，它們之間的接口的電氣和物理設計也是同樣重要。</p><p>　　在傳輸速度為10Gb/s的基礎上，光接收器供

49、應商目前開發(fā)的重點是發(fā)展結合光探測器和前置放大器元件的模塊??。自然隨著時間的推移，更多的電氣功能同樣也將被納入該模塊。本文重點是描述和設計結合光探測器和前置放大器的傳輸速率為10Gb/s的光接收模塊研究。</p><p><b>　　光學接收器的基礎</b></p><p>　　在考慮10Gb/s接收器設計的之前,簡要回顧以前提出的數(shù)字化應用中的光接收器。光接收器前

50、端的一個基本原理如圖1所示，示意圖包括光探測器和前置放大器的元件。</p><p>　　圖1 光接收器前端的一個基本原理圖</p><p>　　光接收器的關鍵要求是在實際應用中要有很高的靈敏度，寬動態(tài)范圍和足夠的頻寬。光電二極管（PD）的目的是將入射的光信號轉換成電流。光電二極管應該具有以下性能特點：高響應（量子效率），低暗電流，低電容和寬頻帶。對于應用在1310nm和1550nm波長的光

51、的波長，量子效率高的InGaAs / InP的類型探測器是常用的選擇。</p><p>　　前置放大電路的目的是把從光電二極管（PD）的光電流轉換成可用的電壓，從而能進一步操作。由于對噪聲、動態(tài)范圍和頻寬之間的最佳權衡，常見的用于光接收器前置放大電路具有高阻抗。其他類型的前置放大器，包括高阻抗和低阻抗（例如50Ω）的設計。</p><p><b>　　PIN光電探測器</b

52、></p><p>　　我們的PIN光電二極管是以一個n+-InP為襯底的雙異質結結構和一個n+-InP緩沖層，一個n--InGaAs積極層和n型InP的帽層。在積極層增長之前，緩沖區(qū)增長提供的表面比存在的裸露材料表面缺陷少。In0.53Ga0 0.47活性層匹配的電勢差為0.75 eV的能隙的InP晶格，對波長小于1.65微米的光很敏感。該器件在遇到0.90μm波長以下的光時才截止接收，因為更有活力的短的

53、波長的光在到達InGaAs之前被INP（電勢1.35 eV）吸收。較大能隙的InP帽層可減少表面泄漏電流（相對的InGaAs），并使用鈍化Si3N4 。使用口罩的Si3N4的蝕刻模式，用摻雜（鋅）的擴散p型去形成片面的P-N結創(chuàng)造的可靠性高的平面二極管在InP-GaAs（帽活躍）異質結的正下方（見圖2a）。使金屬合金與擴散結連接，以便允許電跟結區(qū)的p端接通。在把襯底減薄到120微米后，薄片的背后的金屬是用來提供電氣與n端連接的。背面金屬

54、上的光圈允許光耦合到處在被光的活躍的幾何區(qū)，在光圈中的防反射（AR）Si3N4涂層是來消除來自air-InP接口的反射。</p><p>　　設計時一些關鍵設備造成的沖突必須得到約束，并得到優(yōu)化從而具有為良好的高頻性能。最重要的是能夠實現(xiàn)足夠的3dB帶寬。標準PIN二極管有兩個基本的帶寬限制：（1）有限的渡越時間；（2）信號衰減。只有在增加單位面積電容和較低的量子效率（導致響應較低）的費用時，才可以通過縮短減少厚

55、度活躍的地區(qū)來減少光子傳輸?shù)交钴S地區(qū)的時間。對減薄活性層而靠電容增加的趨勢，可以通過降低總交界處被來抵消，但是這將使實現(xiàn)高光耦合效率和可靠的電氣連接（例如，焊線）具有更大的困難。</p><p>　　為實現(xiàn)10Gb/s的性能，并解決描述的相互矛盾，只要使用直徑30微米的設備就行了。在這種情況下，有源層寬度2.3 um 的Wa產(chǎn)生的平均運輸時間約25PS，這就意味最大帶寬（f3-dB ）為18GHz 。假定有50Ω

56、負載，由此0.15pF電容形成21GHz的帶寬。（請注意，接觸電阻低是另一個減少RC電路帶寬限制的必要設備。）利用微波探頭的光電二極管直接測量可以確認大于 20 GHz的設備帶寬。最后，假設防反射（AR）涂層可減少表面反射到可以忽略不計的水平，這種裝置的量子效率η仍然是相當高的：η= [l - exp(-αWa)] ，其中對于n- -InGaAs和波長為1.55微米的光的光吸收系數(shù)α為0.70 um-1。</p><

57、p><b>　　雪崩光電探測器</b></p><p>　　與PIN二極管相比，雪崩光電二極管設計上傳輸速度達到10Gb/s是更困難，但有益于接器機靈敏度的提高。APD提供了一種規(guī)避PIN二極管的基本量子限制的有效手段，這就決定每個光子只能產(chǎn)生一個電子 - 空穴對。APD結構被設計是用來創(chuàng)建一個足夠高的電場區(qū)域以便給光生載流子加速，并通過與原子碰撞電離，產(chǎn)生電子 - 空穴對。新產(chǎn)生的電

58、子 - 空穴對也同樣加快，并使載流子引發(fā)雪崩效應，從而提供了內(nèi)部能量導致其吸收光子，產(chǎn)生更多的電子 - 空穴對。</p><p>　　所有的InGaAs-InP的APD的采用一個單獨的吸收和乘法（SAM）結構（見圖2b），因為在雪崩效應發(fā)生前，InGaAs吸收區(qū)的高領域會引起大的隧道電流。低摻雜InGaAs吸收區(qū)和InP倍增區(qū)被n型InP層分隔，用來維持InGaAs的低電場和InP高電場。InP倍增區(qū)被類似用于制

59、造PIN結的擴散技術創(chuàng)造的pn結終止。設備的極性取決于空穴產(chǎn)生比碰撞電離的電子有更高的概率；因此設計的結構易于光生空穴從InGaAs注入到InP倍增區(qū)，從而使之具備發(fā)生雪崩的種子。雖然在雪崩效應時內(nèi)部有噪聲（由于每個光子產(chǎn)生的電子 - 空穴對的隨機波動），但只要這個雪崩噪聲是沒有比從其他組件在接收器的噪聲（如放大器）大，APD可以提高接收器上的信噪比。</p><p>　　在具有高的頻率時，放大器的噪聲是不可避免

60、的。</p><p>　　圖2 p-i-n和APD 結構圖</p><p>　　APD的設計是復雜，由許多因素組成。其中最重要的是要控制設備的邊緣過早的雪崩擊穿。平面擴散口的的幾何包括在擴散口周邊的固有曲率。這曲率通常會導致局部電場增強，以及隨之而來的交界處的邊緣雪崩效應增強，而導致在整個設備上發(fā)生的倍增不均勻。為了解決這個問題，我們已經(jīng)使用了一種新的雙擴散技術去塑造擴散輪廓邊緣，使邊緣領

61、域減少。</p><p>　　實現(xiàn)APD的高??帶寬性能，同樣涉及在PIN二極管描述過的傳輸時間和RC限制。然而，雪崩過程本身的固定增益帶寬施加了一個額外的帶寬約束。載流子加速和碰撞電離包括產(chǎn)生雪崩增益過程都要求的“雪崩建立”時間比例增加，因此運行時間越長，器件的帶寬越低。（需要注意的是另一種新的帶寬限制的過程，那就是雪崩過程中在倍增區(qū)中產(chǎn)生的所有電子都必須經(jīng)過InGaAs吸收區(qū)而達到n型結區(qū)。）當被使用的倍增區(qū)

62、變的更薄，產(chǎn)品的增益帶寬變得更高。當倍增層厚度的減少0.2微米，我們就可取得了約90千兆赫的增益帶寬產(chǎn)品（見圖3）。</p><p>　　圖3 90千兆赫的增益帶寬曲線圖</p><p>　　我們設計的APD有一個非常有吸引力的屬性，那就是它更用于制造平面PIN二極管有相同的固定流程。可以預期的是這會導致產(chǎn)品產(chǎn)量提高和設備可靠性提高。我們已經(jīng)證實，我們的2.5Gb/s的APDS（基礎結構類

63、似上述的10Gb/s的設備）有可靠的性能，媲美于pin二極管，而我們在10Gb/s的APD的初始壽命測試已提供了類似的結果。</p><p><b>　　總結</b></p><p>　　現(xiàn)在設計制造的光接收模塊得傳輸速度都已經(jīng)可到達10Gb/5s。根據(jù)靈敏度要求，PIN或APD探測器都可以采用。隨著光模塊的物理描述，平面InGaAs-InP探測器的設計和制造也被相應

64、提出。隨著對（受微波性能影響的）關鍵電路元件的識別效果的重視，提出了基于微波CAD仿真詳細的電氣分析。最后，對PIN和APD接收器測試結果模擬結果進行了比較，呈現(xiàn)出比較強的相關性。</p><p>　　作者：Jim Rue, Mark Mer, Nitish Agrawal, Stephen Bay and William Sherry</p><p><b>　　國籍：美國&l