外文翻譯---使用labview fpga模塊開發(fā)可編程自動化控制器

1、<p><b>　　附錄A 譯文</b></p><p>　　使用LabVIEW FPGA模塊開發(fā)可編程自動化控制器</p><p><b>　　綜述</b></p><p>　　工業(yè)控制上的應(yīng)用要求高度集成的模擬和數(shù)字輸入輸出、浮點運算和多重處理節(jié)點的無縫連接。因為它對這些應(yīng)用的理想解決方案，在工業(yè)控制市場上，

2、可編程自動化控制器（PAC）正逐漸被接受。通過一種普通的軟件開發(fā)環(huán)境NI LabVIEW，國家儀器公司提供各種可編程自動化控制器的解決方案。有了LabVIEW，你可以用像NI LabVIEW FPGA模塊一樣的附加軟件為工業(yè)應(yīng)用開發(fā)自定義輸入輸出界面。</p><p>　　為將FPGA技術(shù)的靈活性和可定制性并入工業(yè)PAC系統(tǒng)，國家儀器公司利用LabVIEW FPGA模塊和實時輸入輸出（RIO）硬件提供了一種直觀、

3、容易理解的解決方法。無須了解低級的硬件描述語言（HDL）或廣泛的硬件設(shè)計細節(jié)，你可以定義嵌入含有RIO硬件對象家族的FPGA芯片里的邏輯，也可以快速地為超高速控制、定制的定時和同步、低級的信號處理、用模擬或數(shù)字定制的輸入輸出、一個單獨設(shè)備的計數(shù)器來定義硬件。你也可以將得到的圖像、分析、運動控制、比如CAN和RS232一樣的工業(yè)協(xié)議集成到你的定制NI RIO（實時輸入輸出）硬件，這樣就可以快速地事先并標(biāo)準(zhǔn)一個完整的PAC系統(tǒng)。</p

4、><p><b>　　1 簡介</b></p><p>　　你可以使用LavVIEW和LavVIEW FPGA 模塊的圖形編程功能在NI RIO器件上配置FPGA（現(xiàn)場可編程門陣列）。將LabVIEW圖形編程功能和FPGA融合在NIRIO硬件上的就是RIO技術(shù)。它為開發(fā)復(fù)雜的測量和操作系統(tǒng)提供了靈活的平臺，而這些你以前只能用定制設(shè)計的硬件來做。  FPG

5、A是一種包含許多未配置邏輯門的芯片。不像那些ASIC（專用集成電路）的芯片只有固定的廠家定制好的功能，你可以為你的特殊的應(yīng)用配置或重新配置FPGA上的邏輯關(guān)系。無論是開發(fā)制作ASIC（專用集成電路）的成本有限還是一大硬件投入使用就要重新配置都可以使用FPGA。由于FPGA的靈活和可軟件編程的架構(gòu)，使得定制算法的高精度實施、精準(zhǔn)的定時和同步、快速決策和多功能同時運行更容易。今天，F(xiàn)PGA正出現(xiàn)在儀器、消費電子產(chǎn)品、汽車、航天器、復(fù)印機和專

6、用的計算機硬件上。雖然FPGA經(jīng)常用于工業(yè)控制產(chǎn)品，它先前的功能在工業(yè)控制器械上是不容易應(yīng)用的。由于定義FPGA需要使用硬件描述語言和復(fù)雜設(shè)計工具的專門技術(shù)，自古就是硬件設(shè)計工程師比控制工程師用FPGA的多。</p><p>　　有了LabVIEW FPGA模塊和NI RIO硬件，你可以用為測量和控制應(yīng)用特殊設(shè)計的LabVIEW這種高級的圖形開發(fā)環(huán)境來開發(fā)PAC了，開發(fā)具有FPGA的專門化、靈活性及高精確性的PA

7、C。因為LabVIEW FPGA 模塊將定制的電路配置到硬件中，所以你的系統(tǒng)可以快速而精確地處理和產(chǎn)生同步的模擬和數(shù)字信號?？梢杂肔abVIEW FPGA 模塊來配置的NI RIO器件。</p><p>　　2 可編程自動化控制器的NIRIO硬件</p><p>　　在以前，F(xiàn)PGA編程僅限于熟習(xí)VHDL或其他低端設(shè)計工具的工程師，也就是說他需要征服艱難的學(xué)習(xí)過程。有了LabVIEW FP

8、GA 模塊，NI公司讓更多領(lǐng)域的工程師能使用FPGA技術(shù)，他們能用LabVIEW圖形開發(fā)功能定義FPGA的邏輯。測量和控制工程師就可以只關(guān)注他們所擅長的測試與控制的應(yīng)用，而不是專注于將邏輯轉(zhuǎn)換成芯片單元的低級語義。LabVIEW FPGA 模塊模型之所以有如此有用，是因為它將LabVIEW FPGA 模塊與FPGA的商業(yè)的未定制（COTS）硬件結(jié)構(gòu)、周圍輸入輸出元件緊密結(jié)合在一起。</p><p>　　NI的可編

9、程自動化控制器為你的工業(yè)控制應(yīng)用提供了標(biāo)準(zhǔn)的、未定制的平臺。有了RIO在PCI、PXI、緊湊型視覺系統(tǒng)平臺和基于RIO的緊湊的RIO引入，工程師們正受益于一個具有FPGA的高性能、靈活性、專用化優(yōu)勢的商業(yè)未定制平臺，結(jié)果是能隨心所欲地開發(fā)PAC。</p><p>　　NI的PCI和PXI的R系列的插件設(shè)備提供了模擬和數(shù)字數(shù)據(jù)獲取，針對高性能、用戶可配置的定時和同步、在單個設(shè)備上的板載決定等功能。利用這些未定制設(shè)備

10、，你可以將你的NI PXI或PCI工業(yè)控制系統(tǒng)，擴展為具有高速離散和模擬信號控制、自定義傳感器接口、精確定時和控制的系統(tǒng)。</p><p>　　NI 緊湊RIO：一個以RIO技術(shù)為核心的平臺，提供了一個小的，工業(yè)上半成品的標(biāo)準(zhǔn)PAC平臺。它能在系統(tǒng)定時方面帶給你高性能輸入輸出和空前靈活性。你可以用NI 緊湊的RIO為諸如車載數(shù)據(jù)采集、汽車NVH（噪聲振動和聲振粗糙度Noise Vibration Harshnes

11、s）測試和內(nèi)置機械控制系統(tǒng)的應(yīng)用，開發(fā)內(nèi)置系統(tǒng)。半成的緊湊RIO系統(tǒng)是工業(yè)評估與鑒定的，是為在大于50g震動和在-40到70°C的溫度范圍內(nèi)設(shè)計的。</p><p>　　NI緊湊型視覺系統(tǒng)是一個半成的機器視覺包裝，他需要經(jīng)受在機器人技術(shù)中常見的苛刻的環(huán)境、自動化測試和工業(yè)檢測系統(tǒng)。NI的CVS-145x設(shè)備為分布式的機器視覺應(yīng)用提供了空前的輸入輸出能力和網(wǎng)絡(luò)連接。NI的CVS-145x系統(tǒng)應(yīng)用IEEE的

12、1394（火線）技術(shù)，可以與40多種有各種各樣功能、性能和價值的照相機兼容。NI的CVS-1455和NI的CVS-1456設(shè)備包含可配置的FPGA，所以你可以在你的機器視覺應(yīng)用中實現(xiàn)計數(shù)器自定義、定時或電機控制。</p><p>　　3 利用LabVIEW和LabVIEW FPGA 模塊開發(fā)可編程自動化控制器</p><p>　　有了LabVIEW 和LabVIEW FPGA 模塊，你就為

13、你的工業(yè)控制硬件增加了重要的靈活性和專用化。因為許多PAC已經(jīng)使用LabVIEW編程的，所以用LabVIEW為FPGA編程很容易，因為它也使用相同LabVIEW開發(fā)環(huán)境。當(dāng)你把目標(biāo)定為在NI的RIO（實時輸入輸出），LabVIEW就只顯示可以在FPGA中實現(xiàn)的功能，這樣進一步使得用LabVIEW為FPGA編程變簡單LabVIEW FPGA 模塊功能版上包含典型的LabVIEW結(jié)構(gòu)與功能，比如while循環(huán)、for循環(huán)、case結(jié)構(gòu)、se

14、quence結(jié)構(gòu)、一系列專業(yè)的LabVIEW 中FPGA專屬的數(shù)學(xué)函數(shù)、信號產(chǎn)生于分析、線性與非線性控制、對比邏輯、數(shù)組和簇操作、Occurrence（意思是事件發(fā)生,Occurrence技術(shù)也用于控制相互獨立的程序同步運行）、信號輸入與輸出和定時。你可以用這些功能的組合往你的NI RIO設(shè)備上定義邏輯和嵌入信息。</p><p>　　在NI的RIO硬件上實現(xiàn)PID（比例積分微分）控制算法的FPGA應(yīng)用和一組在W

15、indows機器或RT對象和NI的RIO硬件通信的應(yīng)用。這種應(yīng)用讀取模擬輸入操作（AIO），運行PID計算，并將結(jié)果數(shù)據(jù)輸出到模擬輸出操作上（AOO）。當(dāng)FPGA時鐘運行在40MHz時，這個例子中的循環(huán)運行的就很慢，因為每一組件需要長于一個時鐘循環(huán)的時間來執(zhí)行。模擬控制循環(huán)在FPGA上能運行在大約200kHz。你可以指定時鐘頻率為編譯的時間。這個例子只展示了PID的循環(huán)，然而，在NI的RIO設(shè)備上創(chuàng)造額外功能僅僅是增加另外一個while

16、循環(huán)。不像傳統(tǒng)的PC處理器，F(xiàn)PGA是并行處理器。在你的應(yīng)用上增加額外循環(huán)不會影響你的PID循環(huán)的表現(xiàn)。</p><p>　　4 FPGA開發(fā)流程</p><p>　　等你創(chuàng)建了LabVIEW FPGA VI后，應(yīng)該編譯將在NI的RIO硬件上運行的代碼。根據(jù)你的代碼的復(fù)雜性和開發(fā)系統(tǒng)的規(guī)格，為一個FPGA VI的編譯時間將從數(shù)分鐘到數(shù)小時不等。為了是開發(fā)效能最大，利用R系列的RIO設(shè)備，你

17、可以用精確到1比特的仿真模式，那樣就可以在開始編譯進程之前檢驗?zāi)阍O(shè)計的邏輯。當(dāng)你用FPGA仿真設(shè)備是，LabVIEW由該設(shè)備進行輸入輸出，并且在Windows電腦上執(zhí)行VI的邏輯。在這種模式，你可以用LabVIEW里的針對Windows的相同調(diào)試工具，比如重點執(zhí)行、探針、斷點。    一旦LabVIEW FPGA的代碼被編譯，你就創(chuàng)建了一個LabVIEW “主機” VI來將你的NI RIO硬件整合到了

18、PAC系統(tǒng)。圖三闡明了創(chuàng)建FPGA應(yīng)用程序的開發(fā)過程。“主機” VI運用在FPGA VI面板的控制器和指示器來在RIO設(shè)備上的FPGA和“主機”處理機械之間傳遞數(shù)據(jù)。這些面板被描述為FPGA上的數(shù)據(jù)寄存器?！爸鳈C”既可以是運行在Windows、個人計算機、PXI控制器或緊湊型視覺系統(tǒng)的PC或PXI控制器，也可以是運行在實時操作系統(tǒng)（RTOS）上的緊湊RIO控制器。</p><p>　　NI的RIO設(shè)備驅(qū)動程序包括

19、一系列為開發(fā)FPGA上通信接口的功能。構(gòu)建主機VI的第一步是打開一個對FPGA VI和RIO設(shè)備的引用。打開了FPGA VI的引用，也就在執(zhí)行時下載并運行了編譯過的FPGA代碼。打開引用后，你就能用讀寫控制函數(shù)對在FPGA上的控制器和指示器寄存器進行讀寫。一旦你將FPGA引用寫到函數(shù)內(nèi)，你只要選擇你想讀寫的控制器和指示器就可以了。你可以將FPGA讀寫函數(shù)封裝在while循環(huán)內(nèi)一邊持續(xù)地對FPGA進行讀寫。最后，LabVIEW主機VI的最

20、后一個函數(shù)就是FPGA VI引用的關(guān)閉函數(shù)。它停止了FPGA VI并關(guān)閉了對設(shè)備的引用。現(xiàn)在你就能通過將其他的已編譯FPGA VI下載到設(shè)備來更改它的功能了。    LabVIEW 主機VI也能用來進行浮點運算、數(shù)據(jù)記錄、網(wǎng)絡(luò)及任何不合適FPGA構(gòu)造的計算。因為增強了確定性與可靠性，你可以在一個有LabVIEW實時模塊的RTOS（實時操作系統(tǒng)）上運行你的主機應(yīng)用。LabVIEW實施系統(tǒng)能為與FPGA同

21、時或不同時的功能提供確切的運算器。例如，浮點算法，包括快速傅里葉變換法、PID比例積分微分算法、自定義控制算法，經(jīng)常在La</p><p>　　在每個R系列和緊湊RIO設(shè)備里都有可利用的閃存來存儲已編譯的LabVIEW 的FPGA VI，都能立即在設(shè)備的電源下運行應(yīng)用程序。這種構(gòu)造，因為FPGA有電源，它能運行FPGA VI，甚至在主機崩潰或斷電時。當(dāng)發(fā)生意外時這對安全編程的掉電上電序列是很理想的。</p&

22、gt;<p>　　5 用NI SoftMotion控制器開發(fā)自定義運動控制器</p><p>　　函數(shù)NI 的SoftMotion開發(fā)模塊可以包括NI RIO設(shè)備、DAQ設(shè)備和緊湊FieldPoint。它為LabVIEW提供VI和幫助你開發(fā)自定義運動控制器的函數(shù)，作為NI PAC硬件平臺的一部分。NI的SoftMotion控制器提供各種各樣的函數(shù)，這些函數(shù)以存在運動控制器DSP上為特色。有了Soft

23、Motion，你能解決路徑設(shè)計、產(chǎn)生軌跡、NI LabVIEW環(huán)境下的位置和速度循環(huán)控制，然后將編碼展開在LabVIEW實時系統(tǒng)或基于LabVIEW FPGA的硬件。</p><p>　　NI SoftMotion控制包括軌線發(fā)生器、樣條引擎和利用PID算法有完整源代碼的監(jiān)督控制、位置速度控制循環(huán)。監(jiān)督控制和軌線發(fā)生器在LabVIEW實時目標(biāo)下運行，而且運行在毫秒級循環(huán)速度。樣條引擎和控制循環(huán)及可以運行在LabV

24、IEW實施目標(biāo)毫秒循環(huán)速度下，也可以在LabVIEW FPGA目標(biāo)微妙循環(huán)速度下。</p><p><b>　　6 應(yīng)用</b></p><p>　　因為LabVIEW FPGA模塊可以配置FPGA的低端硬件設(shè)計，也能在標(biāo)準(zhǔn)系統(tǒng)里利用FPGA ，所以這對需要自定義硬件的工業(yè)控制應(yīng)用是很理想的。這些自定義應(yīng)用包括了數(shù)字模擬信號的自定義混合，計時器的I/O，高達125KH

25、z的模擬控制，20MHz的數(shù)字控制，及下列控制的自定義數(shù)字協(xié)議界面：</p><p><b>　　a.批量控制</b></p><p><b>　　b.離散控制</b></p><p><b>　　c.運動控制</b></p><p><b>　　d.車載數(shù)據(jù)獲取&l

26、t;/b></p><p><b>　　e.機器條件檢測</b></p><p><b>　　f.快速控制原型</b></p><p><b>　　g.工業(yè)控制及獲取</b></p><p>　　h.分布式數(shù)據(jù)獲取及控制</p><p>　　i.手

27、機手提NVH（噪聲振動和聲振粗糙度Noise Vibration Harshness）分析</p><p><b>　　7 結(jié)論</b></p><p>　　LabVIEW FPGA 模塊為PAC平臺帶來了FPGA的靈活性、性能及專業(yè)化。利用NI RIO設(shè)備和LabVIEW 圖形編程，你可以利用在工業(yè)控制應(yīng)用中經(jīng)常用到的COTS硬件開發(fā)靈活及專業(yè)的硬件。因為你在用La

28、bVIEW，一種在很多工業(yè)控制應(yīng)用中用到的語言，來定義你的NI RIO硬件，所以沒有必要學(xué)習(xí)VHDL或其他低端硬件設(shè)計工具來開發(fā)專業(yè)硬件。將LabVIEW FPGA 模塊和NI RIO硬件作為你NI PAC能為需要超高速控制、自定義數(shù)字平臺界面、自定義數(shù)字模擬信號混合、計時器的應(yīng)用增加重要的靈活性和功能。</p><p><b>　　附錄B 外文文獻</b></p><p

29、>　　Building Programmable Automation Controllers with LabVIEW FPGA</p><p><b>　　Overview</b></p><p>　　Programmable Automation Controllers (PACs) are gaining acceptance within the in

30、dustrial control market as the ideal solution for applications that require highly integrated analog and digital I/O, floating-point processing, and seamless connectivity to multiple processing nodes. National Instrument

31、s offers a variety of PAC solutions powered by one common software development environment, NI LabVIEW. With LabVIEW, you can build custom I/O interfaces for industrial applications using add-on softwa</p><p&g

32、t;　　With the LabVIEW FPGA Module and reconfigurable I/O (RIO) hardware, National Instruments delivers an intuitive, accessible solution for incorporating the flexibility and customizability of FPGA technology into indust

33、rial PAC systems. You can define the logic embedded in FPGA chips across the family of RIO hardware targets without knowing low-level hardware description languages (HDLs) or board-level hardware design details, as well

34、as quickly define hardware for ultrahigh-speed control, customiz</p><p>　　1 Introduction </p><p>　　You can use graphical programming in LabVIEW and the LabVIEW FPGA Module to configure the FPGA

35、(field-programmable gate array) on NI RIO devices. RIO technology, the merging of LabVIEW graphical programming with FPGAs on NI RIO hardware, provides a flexible platform for creating sophisticated measurement and contr

36、ol systems that you could previously create only with custom-designed hardware.</p><p>　　An FPGA is a chip that consists of many unconfigured logic gates. Unlike the fixed, vendor-defined functionality of an

37、 ASIC (application-specific integrated circuit) chip, you can configure and reconfigure the logic on FPGAs for your specific application. FPGAs are used in applications where either the cost of developing and fabricating

38、 an ASIC is prohibitive, or the hardware must be reconfigured after being placed into service. The flexible, software-programmable architecture of FPGAs offer ben</p><p>　　With the LabVIEW FPGA Module and NI

39、 RIO hardware, you now can use LabVIEW, a high-level graphical development environment designed specifically for measurement and control applications, to create PACs that have the customization, flexibility, and high-per

40、formance of FPGAs. Because the LabVIEW FPGA Module configures custom circuitry in hardware, your system can process and generate synchronized analog and digital signals rapidly and deterministically. Many of the NI RIO d

41、evices that you can confi</p><p>　　2 NIRIO Hardware for PACs </p><p>　　Historically, programming FPGAs has been limited to engineers who have in-depth knowledge of VHDL or other low-level design

42、 tools, which require overcoming a very steep learning curve. With the LabVIEW FPGA Module, NI has opened FPGA technology to a broader set of engineers who can now define FPGA logic using LabVIEW graphical development. M

43、easurement and control engineers can focus primarily on their test and control application, where their expertise lies, rather than the low-level semantics o</p><p>　　National Instruments PACs provide modula

44、r, off-the-shelf platforms for your industrial control applications. With the implementation of RIO technology on PCI, PXI, and Compact Vision System platforms and the introduction of RIO-based CompactRIO, engineers now

45、have the benefits of a COTS platform with the high-performance, flexibility, and customization benefits of FPGAs at their disposal to build PACs. National Instruments PCI and PXI R Series plug-in devices provide analog a

46、nd digital data acqu</p><p>　　NI CompactRIO, a platform centered on RIO technology, provides a small, industrially rugged, modular PAC platform that gives you high-performance I/O and unprecedented flexibili

47、ty in system timing. You can use NI CompactRIO to build an embedded system for applications such as in-vehicle data acquisition, mobile NVH testing, and embedded machine control systems. The rugged NI CompactRIO system i

48、s industrially rated and certified, and it is designed for greater than 50 g of shock at a temperature </p><p>　　NI Compact Vision System is a rugged machine vision package that withstands the harsh environm

49、ents common in robotics, automated test, and industrial inspection systems. NI CVS-145x devices offer unprecedented I/O capabilities and network connectivity for distributed machine vision applications.NI CVS-145x system

50、s use IEEE 1394 (FireWire) technology, compatible with more than 40 cameras with a wide range of functionality, performance, and price. NI CVS-1455 and NI CVS-1456 devices contain config</p><p>　　3 Building

51、PACs with LabVIEW and the LabVIEW FPGA Module</p><p>　　With LabVIEW and the LabVIEW FPGA Module, you add significant flexibility and customization to your industrial control hardware. Because many PACs are a

52、lready programmed using LabVIEW, programming FPGAs with LabVIEW is easy because it uses the same LabVIEW development environment. When you target the FPGA on an NI RIO device, LabVIEW displays only the functions that can

53、 be implemented in the FPGA, further easing the use of LabVIEW to program FPGAs. The LabVIEW FPGA Module Functions palette inclu</p><p>　　an FPGA application that implements a PID control algorithm on the NI

54、 RIO hardware and a host application on a Windows machine or an RT target that communicates with the NI RIO hardware. This application reads from analog input 0 (AI0), performs the PID calculation, and outputs the result

55、ing data on analog output 0 (AO0). While the FPGA clock runs at 40 MHz the loop in this example runs much slower because each component takes longer than one-clock cycle to execute. Analog control loops can run </p>

56、;<p>　　4 FPGA Development Flow </p><p>　　After you create the LabVIEW FPGA VI, you compile the code to run on the NI RIO hardware. Depending on the complexity of your code and the specifications of yo

57、ur development system, compile time for an FPGA VI can range from minutes to several hours. To maximize development productivity, with the R Series RIO devices you can use a bit-accurate emulation mode so you can verify

58、the logic of your design before initiating the compile process. When you target the FPGA Device Emulator, LabVIEW accesse</p><p>　　Once the LabVIEW FPGA code is compiled, you create a LabVIEW host VI to inte

59、grate your NI RIO hardware into the rest of your PAC system. the development process for creating an FPGA application. The host VI uses controls and indicators on the FPGA VI front panel to transfer data between the FPGA

60、 on the RIO device and the host processing engine. These front panel objects are represented as data registers within the FPGA. The host computer can be either a PC or PXI controller running Windows or a </p><

61、p>　　The NI RIO device driver includes a set of functions to develop a communication interface to the FPGA. The first step in building a host VI is to open a reference to the FPGA VI and RIO device. The Open FPGA VI Re

62、ference function, also downloads and runs the compiled FPGA code during execution. After opening the reference, you read and write to the control and indicator registers on the FPGA using the Read/Write Control function.

63、 Once you wire the FPGA reference into this function, you can simpl</p><p>　　The LabVIEW host VI can also be used to perform floating-point calculations, data logging, networking, and any calculations that d

64、o not fit within the FPGA fabric. For added determinism and reliability, you can run your host application on an RTOS with the LabVIEW Real-Time Module. LabVIEW Real-Time systems provide deterministic processing engines

65、for functions performed synchronously or asynchronously to the FPGA. For example, floating-point arithmetic, including FFTs, PID calculations, and cus</p><p>　　Within each R Series and CompactRIO device, the

66、re is flash memory available to store a compiled LabVIEW FPGA VI and run the application immediately upon power up of the device. In this configuration, as long as the FPGA has power, it runs the FPGA VI, even if the hos

67、t computer crashes or is powered down. This is ideal for programming safety power down and power up sequences when unexpected events occur.</p><p>　　5 Using NI SoftMotion to Create Custom Motion Controllers

68、</p><p>　　The NI SoftMotion Development Module for LabVIEW provides VIs and functions to help you build custom motion controllers as part of NI PAC hardware platforms that can include NI RIO devices, DAQ dev

69、ices, and Compact FieldPoint. NI SoftMotion provides all of the functions that typically reside on a motion controller DSP. With it, you can handle path planning, trajectory generation, and position and velocity loop con

70、trol in the NI LabVIEW environment and then deploy the code on LabVIEW Real-Time or</p><p>　　NI SoftMotion includes functions for trajectory generator and spline engine and examples with complete source code

71、 for supervisory control, position, and velocity control loop using the PID algorithm. Supervisory control and the trajectory generator run on a LabVIEW Real-Time target and run at millisecond loop rates. The spline engi

72、ne and the control loop can run either on a LabVIEW Real-Time target at millisecond loop rates or on a LabVIEW FPGA target at microsecond loop rates.</p><p>　　6 Applications </p><p>　　Because th

73、e LabVIEW FPGA Module can configure low-level hardware design of FPGAs and use the FPGAs within in a modular system, it is ideal for industrial control applications requiring custom hardware. These custom applications ca

74、n include a custom mix of analog, digital, and counter/timer I/O, analog control up to 125 kHz, digital control up to 20 MHz, and interfacing to custom digital protocols for the following:</p><p>　　a.Batch c

75、ontrol</p><p>　　b.Discrete control</p><p>　　c.Motion control</p><p>　　d.In-vehicle data acquisition</p><p>　　e.Machine condition monitoring</p><p>　　f.Rapi

76、d control prototyping (RCP)</p><p>　　g.Industrial control and acquisition</p><p>　　h.Distributed data acquisition and control</p><p>　　i.Mobile/portable noise, vibration, and harshn

77、ess (NVH) analysis</p><p>　　7 Conclusion </p><p>　　The LabVIEW FPGA Module brings the flexibility, performance, and customization of FPGAs to PAC platforms. Using NIRIO devices and LabVIEW graph

78、ical programming, you can build flexible and custom hardware using the COTS hardware often required in industrial control applications. Because you are using LabVIEW, a programming language already used in many industria