基于0.18μmcmos工藝的低電壓、低功耗、超高速集成電路設計

1、東南大學碩士學位論文基于0.18μmCMOS工藝的低電壓、低功耗、超高速集成電路設計姓名：姜輝申請學位級別：碩士專業(yè)：電路與系統(tǒng)指導教師：馮軍20060301AbstractAbstractSeveralcharacteristicsandtrends，suchasnetwork，digital，intelligenceandlowpowerpresentduringtheinnovationanddevelopmentofITindu

2、stryHighspeed，broadbandcommunicationnetworkarerequiredtocommunicateinformationForthesereasonOpticalcommunicationwillgraduallyreplacecablecommunicationInopticaltransmissionsystemDemultiplexer(Demux)isa士thetailendoftheopti

3、cfiberreceiveLDemuxtransformstheonewayhighspeedserialsignalwhichfromdatadecisiontoN(N1)waylowspeedparallelsignalThereforeDemuxisanimportantpartofhighspeedcommunicationsystem，itsperformancedirectlyinfluencethelastoutputsi

4、gnalSo，highspeedDemuxcircuitistheindispensablekeycircuitinopticalcommunicationAdditionallysuperhighspeedfrequencydividersarewidelyappliedinopticalcommunicationandwirelesscommunicationsystemInaDemuxfrequencydividerconvert

5、sthehigllspeedclocktothelowerspeedclockInthecase，frequencydividerisoneofthecircuitsworkingonthehighestfrequencyWiththedevelopmentofCMOSprocess，designofsuperhighspeedfrequencydividerbasedonCMOSprocessmakesgreatsenseTheart

6、iclesmainobjectiveistoanalyze，researchandrealizeasuperhi曲speedfrequencydividercircuitbasedon0189naCMOSprocess，andthecircuitsworkrateisover20GHzAndbasedonthegameprocess，analyze，researchalowvoltage，lowpower1：4Demuxapplying

7、forSTM64thechipwillbesenttofoundryinthenextMPWprojectandsubsequentlybetestedonwaferSincethestandardvoltageino18_tmCMOSprocessis18Vand工is49GHzin12Vtraditionalcircuitstructuresarehardtoworkupto10Gb／s，similarlythetraditiona

8、lonesin18Vpowersupplyarehardtoworkupto20GHzInordertoachievetheunificationoflowvoltage，lowpowerandsuperhighspeed，thearticleappliesanimprovedcommongatestructuredynamicloadlatchBasedonthislatchdesignandrealizea1：4superhighs

9、peedfrequencydividerinTSMC0189mCMOSprocessOnwaferexperimentalresultsshowitshighestworkratecanbeupto26GHz，anditsworkrangeisover20GHz；Packageexperimentalresultsshowthechipcanworkupto196GHzandperformswellin10GHzwhichisthede

10、skedworkrateThearticlealsoaccomplishesthesimulationandlayoutdesignofa12V10Gb／s10mW1：4Demuxbasedthesameprocess，thechipwillbeseattofoundryinthenextMPWprojectandsubsequentlybetestedonwaferThearticlepresentsthebasicprinciple

11、ofDemuxandfrequencydivideganddescribesthedesignflowindetailbythesequenceofcircuitdesign，layoutdesignandchiptestFinallythepapergivesthetestresultsofthe1：4superhighspeedfrequencydividerTheonwaferandpackagemeasurementresult

12、softhechipsetshowthatthelowvollage，lowpowersuperhi曲speedfrequencydividerworkswellandtotallymeetthetaskofthedesignThechiphasthebrightfutureinindustrialization[Keywords]OpticalcommunicationDemultiplexerFrequencyDividerLowp