DSP監(jiān)控的數(shù)字示波器關(guān)鍵技術(shù)研究.pdf

1、分類號(hào)密級(jí)UDC學(xué)位論文DSP監(jiān)控的數(shù)字示波器關(guān)鍵技術(shù)研究監(jiān)控的數(shù)字示波器關(guān)鍵技術(shù)研究薛奮奮指導(dǎo)教師姓名陳長(zhǎng)齡教授教授電子科技大學(xué)電子科技大學(xué)成都成都申請(qǐng)學(xué)位級(jí)別碩士碩士專業(yè)名稱測(cè)試計(jì)量技術(shù)及儀器測(cè)試計(jì)量技術(shù)及儀器論文提交日期2005.52005.5論文答辯日期2005.52005.5學(xué)位授予單位和日期電子科技大學(xué)電子科技大學(xué)答辯委員會(huì)主席評(píng)閱人年月日注1注明《國(guó)際十進(jìn)分類法UDC》的類DSP監(jiān)控的數(shù)字示波器關(guān)鍵技術(shù)研究IIABSTRA

2、CTNowadaystheOscilloscopetechnologyisprogressingrapidly.Withthedevelopmentofthedigitaltechnologythedigitalstageoscilloscope(DSO)hasprovidedwithmepowerfulfunctions，suchasintelligentwavecapturingparameteranalysisthetimefre

3、quencetransfmverylargescalewavedatastingdatashareonwksoon.Allthefunctionswillrequirefasterspeedofthecontrolsystemstrongerabilityofdigitalprocessing.Thepurposeoftheprojectjustistobuilda200MSPSDSOwiththeDSP(DigitalSignalPr

4、ocess)FPGA(FieldProgrammableGatesArray).ComparedwiththeSCP(SingleChipProcess)withlessthan100MHzClockRatetheHighPerfmanceFixedPointDSP(TMS320C6205)has200MHzClockRate.TheuseoftheFPGAcannotonlymakeiteasytodebugthesystembuta

5、lsocutdowntheexpensevolumeofthesystemsothattheDSOwillbecomeptable.IntheprojectthesystemintegratesaDSPitsexternalperipheralsadataacquisitionsystemaFPGA.AllofthemarelocatedinaPCB(PrintedCircuitBoard).Thusifaexternalkeyboar

6、ddisplayinterfaceareprovideditwillbecomeafullfunctionallowcostdigitalstageoscilloscopewithhigherperfmancetopriceratiostrongercompetitivecapacityinmarketwidestappliedfeground.InthisdissertationtheDSOisintroducedfirstly.th