外文翻譯---基于基于單片機進行實時日歷和時鐘顯示設計

1、<p><b>　　畢業(yè)論文（設計）</b></p><p><b>　　外文翻譯</b></p><p>　　學 生 姓 名： </p><p>　　指導教師： </p><p>　　合作指導教師：

2、 </p><p>　　專業(yè)名稱： 自動化 </p><p>　　所在學院： </p><p>　　2012年 6月</p><p>　　Design of single chip real time clock and calendar

3、 based on</p><p>　　Abstract: This clock and calendar uses the AT89S52 microcontroller as the core for the control. Time Circuit which is constituted by Dallas's DS1302 real-time clock chip achieved a tim

4、e and date display, it increased functionality for the temperature display and the whole point timekeeping. This paper discusses the hardware circuit of the system, principle in detail , and gives the flow chart of the s

5、oftware design and the major source code. Keywords: microcontroller; real-time clock; Temperatur</p><p>　　1 Introduction </p><p>　　Clock and calendar-bedroom at home, schools, stations and more

6、and more extensive use of plaza for people's lives, study, work great convenience. clock and calendar for the past need to re-adjust after power-off time and date, and time is a big error. Designed the system using r

7、eal-time clock chip (DS1302) as a timer parts, the chip comes with an internal crystal oscillator, so that effectively guarantee the accuracy of the time and hang own internal battery power makes the situation will conti

8、n</p><p>　　2 System hardware design </p><p>　　Schematic circuit shown in Figure 2:</p><p>　　System architecture diagram</p><p>　　2.1 Power Supply Circuit </p>&l

9、t;p>　　In order to reduce circuit costs, the system power supply circuit by the transformer transformer, three-terminal integrated regulator (L7805> circuit 5V, has a simple, reliable, inexpensive and so on. </p&

10、gt;<p>　　2.2 Host Controller </p><p>　　Host controller using ATMEL's latest MCU Products AT89S52. Apart from the single-chip microcomputer has a MCS-51 series single-chip all the benefits of thing

11、s,also has 8KB of internal in-system programmable FLASH memory,free and low-power brown-out mode, greatly reducing the power circuit . In addition,also has a watchdog circuit,a reliable job for the circuit provides great

12、er assurance. </p><p>　　2.3 digital tube display circuit </p><p>　　Show circuit with a high brightness,long life,low cost features such as the LED digital tube. Throughout the show circuit by th

13、e digital control and display LED drive circuit and decoding circuit. Because of the system to display the contents of more,a total of 16 digital tube, respectively,with eight shows year,month,day,four show time,show tha

14、t 22 weeks,2 show the temperature. Controller in order to save resources,between the controller and displays add a decoding circuit 16 so that would have</p><p>　　2.4 Real-time clock chip </p><p&g

15、t;　　This design uses the United States Dallas company DS1302, the chip can automatically generate century,year,month,day,hour,minute,second,such as time information. Century the use of internal registers with the softwar

16、e will be able to resolve the 'Millennium', the problem. The chip has its own internal battery-keng,external brown-out,the internal time information also be able to maintain for 10 years. Time for a single day re

17、cord of 12 hours and there is a 24-hour mode. Time Table </p><p>　　Ways that also has two kinds of binary numbers,and the other with BCD code express. The chip with 128 bytes of internal RAM,one of 11 bytes

18、used to store time information,4 bytes of memory chips used to control information,known as the control register,113-byte general-purpose RAM for users to store temporary information. In addition,users can also program t

19、he chip to control a variety of square-wave output,and its internal three-way through the software interrupt shielding. </p><p>　　2.5 Buttons and temperature measurements and circuit </p><p>　　T

20、he system in order to make the circuit more easy,button circuit design only three keys, which are 'set','+','-', three keys to adjust the calendar and clock. The system in order to improve the pra

21、cticality of the circuit,an increase of a temperature display. The system temperature measurement circuit using Dallas's DS18B20. The device because of its low price,easy circuits,measurement precision,etc.. </p&g

22、t;<p>　　2.6 audio signal generator and driver circuit </p><p>　　The circuit's function is to receive control circuit to send to the entire point of time and timing signal,according to system setti

23、ngs produce different frequencies of audio signals,amplification by the drive circuit to drive speakers to voice their opinions in order to realize the whole point timekeeping and alarm functions. </p&g

24、t;<p>　　Description</p><p>　　The AT89S52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured

25、 using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-52 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a c

26、onventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip</p><p>　　Function characteristic</p><p>　　The AT89S52 provides the following standar

27、d features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, th

28、e AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and in

29、terrupt system to </p><p>　　Pin Description</p><p>　　VCC：Supply voltage.</p><p>　　GND：Ground.</p><p>　　Port 0：Port 0 is an 8-bit open-drain bi-directional I/O port. As

30、an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus during ac

31、cesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups a</

32、p><p><b>　　Port 1</b></p><p>　　Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 p

33、ins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the lo

34、w-order address bytes during Flash programming and verification.</p><p><b>　　Port 2</b></p><p>　　Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output bu

35、ffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source curr

36、ent, because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. In</p><p><

37、b>　　Port 3</b></p><p>　　Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled

38、high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special fea

39、tures of the AT89C51 as listed below:</p><p>　　Port 3 also receives some control signals for Flash programming and verification.</p><p><b>　　RST</b></p><p>　　Reset input

40、. A high on this pin for two machine cycles while the oscillator is running resets the device.</p><p><b>　　ALE/PROG</b></p><p>　　Address Latch Enable output pulse for latching the lo

41、w byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, an

42、d may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8

43、EH. Wit</p><p><b>　　PSEN</b></p><p>　　Program Store Enable is the read strobe to external program memory.When the AT89S52 is executing code from external program memory, PSEN is acti

44、vated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.</p><p><b>　　EA/VPP</b></p><p>　　External Access Enable. EA mu

45、st be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on re

46、set.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage(VPP) during Flash programming, for parts that require12-volt VPP.</p><p><b&g

47、t;　　XTAL1</b></p><p>　　Input to the inverting oscillator amplifier and input to the internal clock operating circuit.</p><p><b>　　XTAL2</b></p><p>　　Output from th

48、e inverting oscillator amplifier.</p><p>　　Oscillator Characteristics</p><p>　　XTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as

49、 an on-chip oscillator, as shown in Figure 1.Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in

50、 Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two fli</p><p>　　Figure 1. Oscillator Connections

51、 Figure 2. External Clock Drive Configuration</p><p><b>　　Idle Mode</b></p><p>　　In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active.

52、The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.I

53、t should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution,from where it left off, up to two machine cycles before the internal reset</p><p>　　Power-do

54、wn Mode</p><p>　　In the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their v

55、alues until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to

56、its normal operating level and must be held active long enough to allow the oscillator to </p><p>　　Program Memory Lock Bits</p><p>　　On the chip are three lock bits which can be left unprogramm

57、ed (U) or can be programmed (P) to obtain the additional features listed in the table below.</p><p>　　When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the

58、device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at t

59、hat pin in order for the device to function properly.</p><p>　　基于基于單片機進行實時日歷和時鐘顯示設計</p><p>　　摘要:日歷及時鐘顯示以AT89S52單片機為控制核心，采用Dallas公司的DS1302實時鐘芯片構成計時電路，實現(xiàn)了時間和日期的顯示，還增加了溫度顯示和整點報時的功能。文章對該系統(tǒng)的硬件電路、工作原理

60、做了詳細介紹，同時給出了軟件設計的流程圖及主要程序源代碼。</p><p>　　關鍵詞:單片機，實時鐘.溫度測量</p><p><b>　　1引言</b></p><p>　　日歷及時鐘顯示在家庭居室、學校、車站和廣場使用越來越廣泛，給人們的生活、學習、工作帶來極大的方便。針對以往的電子萬年歷斷電后需重新調整時間與日期，且計時誤差大的現(xiàn)象。本

61、系統(tǒng)設計采用實時鐘芯片(DS1302)作為計時器件，該芯片內部自帶晶體振蕩器，這樣就有效的保證了計時的精確性，并且內部自帶鏗電池使得在斷電情況能繼續(xù)更新時間信息。本設計采用AT89S52作為主控制器，為了提高電路的實用性加入溫度測量電路、報時和鬧鐘功能。</p><p><b>　　2系統(tǒng)硬件的設計</b></p><p>　　電路原理圖如圖所示：</p>

62、<p><b>　　該系統(tǒng)的結構框圖</b></p><p>　　系統(tǒng)的工作原理是:主控制器每隔一段時間(小于一秒鐘)讀一次時鐘芯片的內部寄存器的值，將讀出的日歷、時間信息實時的顯示在LED數(shù)碼顯示器一上。同時，主控制器不斷的掃描按鍵電路和溫度測量電路，當有鍵按下時，識別出按鍵的值并調整相應的時間或日歷的值再寫入時鐘芯片內部。溫度數(shù)據(jù)由測量電路(DS18B20)獲得的溫度值送入

63、顯示電路顯示。</p><p><b>　　2. 1電源電路</b></p><p>　　為了減少電路成本，本系統(tǒng)電源電路由變壓器變壓、三端集成穩(wěn)壓(L7805>電路產(chǎn)生5V，具有簡單、可靠、價格低廉等特點。</p><p><b>　　2. 2主控制器</b></p><p>　　主控制器采

64、用ATMEL公司的最新系列單片機產(chǎn)品AT89S52。該單片機除了擁有MCS-51系列單片機的所有優(yōu)點外，內部還具有8KB的在系統(tǒng)可編程FLASH存儲器，低功耗的空閑和掉電模式，極大的降低了電路的功耗。另外，還具有一個看門狗電路，為電路的可靠工作提供了更大的保證。</p><p>　　2. 3數(shù)碼管顯示電路</p><p>　　顯示電路采用具有高亮度、使用壽命長、價格低廉等特點的LED數(shù)碼管

65、。整個顯示電路由LED數(shù)碼管和顯示驅動電路和譯碼電路構成。由于本系統(tǒng)中顯示的內容較多，共需要16個數(shù)碼管，分別用八位顯示年、月、日，四位顯示時間，二二位顯示星期，二位顯示溫度。為了節(jié)省控制器的資源，在控制器和顯示器之間加入一個譯碼電路使本來需要16根控制線的電路變成只需四根控制線，極大的節(jié)省了系統(tǒng)資源。該譯碼器由兩個3-8譯碼器構成。</p><p><b>　　2. 4實時鐘芯片</b>&

66、lt;/p><p>　　本設計采用美國Dallas公司的DS12C887A，該芯片能夠自動產(chǎn)生世紀、年、月、日、時、分、秒等時間信息。利用內部的世紀寄存器，配合軟件就能解決’千年’，的問題。該芯片內部自帶有鏗電池，外部掉電時，其內部的時間信息還能夠保持10年之久。對于一天內的時間記錄有 12小時制和24小時制兩種模式。時間的表示方法也有兩種，一種用二進制數(shù)表示，另一種用BCD碼表示。該芯片內部帶有128字節(jié)的RAM，

67、其中11字節(jié)用來存儲時間信息，4字節(jié)用來存儲芯片的控制信息，稱為控制寄存器，113字節(jié)通用RAM可供用戶存儲臨時信息。此外，用戶還可以對芯片進行編程控制輸出各種方波，并可對其內部的三路中斷通過軟件進行屏蔽。</p><p>　　2. 5按鍵與溫度測且電路</p><p>　　本系統(tǒng)為了使電路更簡單，按鍵電路只設計了三個按鍵，分別是’設置’、’+’、’-’，三個鍵用來調整日歷以及時鐘。本系統(tǒng)

68、為了提高電路的實用性，增加了一個溫度顯示功能。該系統(tǒng)的溫度測量電路采用Dallas公司的DS1280。該器件由于其具有價格低廉、電路簡單、測量精確等優(yōu)點。</p><p>　　2. 6音頻信號產(chǎn)生及驅動電路</p><p>　　本電路的功能是接收控制電路發(fā)送來的整點報時及定時信號，根據(jù)系統(tǒng)設定產(chǎn)生不同頻率的音頻信號，由驅動電路加以放大驅動揚聲器發(fā)出聲音，從而實現(xiàn)整點報時及鬧鐘的功能。 &l

69、t;/p><p><b>　　描述</b></p><p>　　AT89S52是一個低電壓，高性能CMOS8位單片機帶有4K字節(jié)的可反復擦寫的程序存儲器（PENROM）。和128字節(jié)的存取數(shù)據(jù)存儲器（RAM），這種器件采用ATMEL公司的高密度、不容易丟失存儲技術生產(chǎn)，并且能夠與MCS-52系列的單片機兼容。片內含有8位中央處理器和閃爍存儲單元，有較強的功能的AT89S5

70、2單片機能夠被應用到控制領域中。</p><p><b>　　功能特性</b></p><p>　　AT89S52提供以下的功能標準：4K字節(jié)閃爍存儲器，128字節(jié)隨機存取數(shù)據(jù)存儲器，32個I/O口，2個16位定時/計數(shù)器，1個5向量兩級中斷結構，1個串行通信口，片內震蕩器和時鐘電路。另外，AT89S52還可以進行0HZ的靜態(tài)邏輯操作，并支持兩種軟件的節(jié)電模式。閑散方

71、式停止中央處理器的工作，能夠允許隨機存取數(shù)據(jù)存儲器、定時/計數(shù)器、串行通信口及中斷系統(tǒng)繼續(xù)工作。掉電方式保存隨機存取數(shù)據(jù)存儲器中的內容，但震蕩器停止工作并禁止其它所有部件的工作直到下一個復位。</p><p><b>　　引腳描述</b></p><p>　　VCC：電源電壓 </p><p><b>　　GND：地</b

72、></p><p><b>　　P0口：</b></p><p>　　P0口是一組8位漏極開路雙向I/O口，即地址/數(shù)據(jù)總線復用口。作為輸出口時，每一個管腳都能夠驅動8個TTL電路。當“1”被寫入P0口時，每個管腳都能夠作為高阻抗輸入端。P0口還能夠在訪問外部數(shù)據(jù)存儲器或程序存儲器時，轉換地址和數(shù)據(jù)總線復用，并在這時激活內部的上拉電阻。P0口在閃爍編程時，P0口

73、接收指令，在程序校驗時，輸出指令，需要接電阻。</p><p><b>　　P1口：</b></p><p>　　P1口一個帶內部上拉電阻的8位雙向I/O口，P1的輸出緩沖級可驅動4個TTL電路。對端口寫“1”，通過內部的電阻把端口拉到高電平，此時可作為輸入口。因為內部有電阻，某個引腳被外部信號拉低時輸出一個電流。閃爍編程時和程序校驗時，P1口接收低8位地址。<

74、/p><p><b>　　P2口：</b></p><p>　　P2口是一個內部帶有上拉電阻的8位雙向I/O口，P2的輸出緩沖級可驅動4個TTL電路。對端口寫“1”，通過內部的電阻把端口拉到高電平，此時，可作為輸入口。因為內部有電阻，某個引腳被外部信號拉低時會輸出一個電流。在訪問外部程序存儲器或16位地址的外部數(shù)據(jù)存儲器時，P2口送出高8位地址數(shù)據(jù)。在訪問8位地址的外部數(shù)

75、據(jù)存儲器時，P2口線上的內容在整個運行期間不變。閃爍編程或校驗時，P2口接收高位地址和其它控制信號。</p><p><b>　　P3口：</b></p><p>　　P3口是一組帶有內部電阻的8位雙向I/O口，P3口輸出緩沖故可驅動4個TTL電路。對P3口寫如“1”時，它們被內部電阻拉到高電平并可作為輸入端時，被外部拉低的P3口將用電阻輸出電流。</p>

76、<p>　　P3口除了作為一般的I/O口外，更重要的用途是它的第二功能，如下表所示：</p><p>　　P3口還接收一些用于閃爍存儲器編程和程序校驗的控制信號。</p><p><b>　　RST：</b></p><p>　　復位輸入。當震蕩器工作時，RET引腳出現(xiàn)兩個機器周期以上的高電平將使單片機復位。</p>

77、<p><b>　　ALE/：</b></p><p>　　當訪問外部程序存儲器或數(shù)據(jù)存儲器時，ALE輸出脈沖用于鎖存地址的低8位字節(jié)。即使不訪問外部存儲器，ALE以時鐘震蕩頻率的1/16輸出固定的正脈沖信號，因此它可對輸出時鐘或用于定時目的。要注意的是：每當訪問外部數(shù)據(jù)存儲器時將跳過一個ALE脈沖時，閃爍存儲器編程時，這個引腳還用于輸入編程脈沖。如果必要，可對特殊寄存器區(qū)中的8

78、EH單元的D0位置禁止ALE操作。這個位置后只有一條MOVX和MOVC指令ALE才會被應用。此外，這個引腳會微弱拉高，單片機執(zhí)行外部程序時，應設置ALE無效。</p><p><b>　　PSEN：</b></p><p>　　程序儲存允許輸出是外部程序存儲器的讀選通信號，當AT89C51由外部程序存儲器讀取指令時，每個機器周期兩次PSEN 有效，即輸出兩個脈沖。在此

79、期間，當訪問外部數(shù)據(jù)存儲器時，這兩次有效的PSEN 信號不出現(xiàn)。</p><p><b>　　EA/VPP：</b></p><p>　　外部訪問允許。欲使中央處理器僅訪問外部程序存儲器，EA端必須保持低電平。需要注意的是：如果加密位LBI被編程，復位時內部會鎖存EA端狀態(tài)。如EA端為高電平，CPU則執(zhí)行內部程序存儲器中的指令。閃爍存儲器編程時，該引腳加上+12V的編

80、程允許電壓VPP，當然這必須是該器件是使用12V編程電壓VPP。</p><p>　　XTAL1：震蕩器反相放大器及內部時鐘發(fā)生器的輸入端。</p><p>　　XTAL2：震蕩器反相放大器的輸出端。</p><p><b>　　時鐘震蕩器</b></p><p>　　AT89S52中有一個用于構成內部震蕩器的高增益反相

81、放大器，引腳XTAL1和XTAL2分別是該放大器的輸入端和輸出端。這個放大器與作為反饋元件的片外石英晶體或陶瓷諧振器一起構成自然震蕩器。 外接石英晶體及電容C1，C2接在放大器的反饋回路中構成并聯(lián)震蕩電路。對外接電容C1，C2雖然沒有十分嚴格的要求，但電容容量的大小會輕微影響震蕩頻率的高低、震蕩器工作的穩(wěn)定性、起振的難易程序及溫度穩(wěn)定性。如果使用石英晶體，我們推薦電容使用30PF±10PF，而如果使用陶瓷振蕩器建議選擇40PF

82、±10PF。用戶也可以采用外部時鐘。采用外部時鐘的電路如圖示。這種情況下，外部時鐘脈沖接到XTAL1端，即內部時鐘發(fā)生器的輸入端，XTAL2則懸空。由于外部時鐘信號是通過一個2分頻觸發(fā)器后作為內部時鐘信號的，所以對外部時鐘信號的占空比沒有特殊要求，但最小高電平持續(xù)時間和最大的低電平持續(xù)時間應符合產(chǎn)品技術條件的要求。</p><p>　　內部振蕩電路

83、 外部振蕩電路</p><p><b>　　閑散節(jié)電模式</b></p><p>　　AT89S52有兩種可用軟件編程的省電模式，它們是閑散模式和掉電工作模式。這兩種方式是控制專用寄存器PCON中的PD和IDL位來實現(xiàn)的。PD是掉電模式，當PD=1時，激活掉電工作模式，單片機進入掉電工作狀態(tài)。IDL是閑散等待方式，當IDL=1，激活閑散工作狀態(tài)，單片機進入睡

84、眠狀態(tài)。如需要同時進入兩種工作模式，即PD和IDL同時為1，則先激活掉電模式。在閑散工作模式狀態(tài)，中央處理器CPU保持睡眠狀態(tài)，而所有片內的外設仍保持激活狀態(tài)，這種方式由軟件產(chǎn)生。此時，片內隨機存取數(shù)據(jù)存儲器和所有特殊功能寄存器的內容保持不變。閑散模式可由任何允許的中斷請求或硬件復位終止。終止閑散工作模式的方法有兩種，一是任何一條被允許中斷的事件被激活，IDL被硬件清除，即刻終止閑散工作模式。程序會首先影響中斷，進入中斷服務程序，執(zhí)行完

85、中斷服務程序，并緊隨RETI指令后，下一條要執(zhí)行的指令就是使單片機進入閑散工作模式，那條指令后面的一條指令。二是通過硬件復位也可將閑散工作模式終止。需要注意的是：當由硬件復位來終止閑散工作模式時，中央處理器CPU通常是從激活空閑模式那條指令的下一條開始繼續(xù)執(zhí)行程序的，要完成內部復位操作</p><p><b>　　掉電模式</b></p><p>　　在掉電模式下，振

86、蕩器停止工作，進入掉電模式的指令是最后一條被執(zhí)行的指令，片內RAM和特殊功能寄存器的內容在中指掉電模式前被凍結。退出掉電模式的唯一方法是硬件復位，復位后將從新定義全部特殊功能寄存器但不改變RAM中的內容，在VCC恢復到正常工作電平前，復位應無效切必須保持一定時間以使振蕩器從新啟動并穩(wěn)定工作。</p><p>　　閑散和掉電模式外部引腳狀態(tài)。</p><p><b>　　程序存儲器

87、的加密</b></p><p>　　AT89S52可使用對芯片上的三個加密位LB1，LB2，LB3進行編程（P）或不編程（U）得到如下表所示的功能：</p><p>　　當LB1被編程時，在復位期間，EA端的電平被鎖存，如果單片機上電后一直沒有復位，鎖存起來的初始值是一個不確定數(shù)，這個不確定數(shù)會一直保存到真正復位位置。為了使單片機正常工作，被鎖存的EA電平與這個引腳當前輯電平一